Core-Transistor Voltage Provision Circuit for Low-Stress Level Shifting
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Solution Overview
Problem
Existing level shifters using core devices in advanced semiconductor nodes face reliability issues due to high voltage stress, which can damage the circuit and affect operation.
Innovation Solution
A voltage provision circuit utilizing core devices that generates fractional voltages and intermediate signals to reduce stress, employing serially coupled inverters and power switch control circuits to manage voltage levels, ensuring each transistor's voltage drop is less than the fractional voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If core devices are used in advanced semiconductor nodes to achieve higher integration density and speed, then productivity and speed are improved, but the devices become more susceptible to voltage stress damage, worsening reliability
Solution Approach 1:
A voltage provision circuit is introduced as an intermediary component between the I/O interface and the core logic. This circuit generates intermediate voltage levels (e.g., VDDQ at 0.9V) that are lower than the full I/O voltage (e.g., VQPS at 1.8V), thereby mediating the voltage stress on core devices while maintaining their operational functionality and protecting against damage
2Power
If I/O devices operate at high voltages to drive external signals, then power driving capability is improved, but the voltage stress on core devices increases, worsening reliability
Solution Approach 1:
The voltage provision circuit segments the voltage domain into multiple levels: a high voltage domain for I/O operations (VQPS) and a lower intermediate voltage domain for core device operation (VDDQ). This segmentation allows I/O devices to operate at high voltages for strong external signal driving while core devices operate at reduced voltages, avoiding stress damage
3Reliability
If voltage levels are reduced to protect core devices from stress, then reliability is improved, but the ability to drive external I/O signals diminishes, worsening power capability
Solution Approach 1:
The voltage provision circuit acts as a voltage mediator that provides appropriately scaled voltage levels to different circuit blocks. It supplies reduced voltage (VDDQ) to voltage-sensitive core logic to protect from stress while simultaneously providing full voltage (VQPS) to I/O buffers through level shifters, thereby maintaining both reliability and external signal driving capability
Data Source
AI summary
The present disclosure includes a voltage provision circuit. In one aspect of the present disclosure, a voltage provision circuit is disclosed. The voltage provision circuit includes a first NMOS transistor gated with a first control signal and sourced with a ground voltage. The voltage provision circuit includes a second NMOS transistor gated with a second control signal complementary to the first control signal and sourced with the ground voltage. The voltage provision circuit includes a first PMOS transistor sourced with a first supply voltage. The voltage provision circuit includes a second PMOS transistor sourced with the first supply voltage. The voltage provision circuit includes a voltage modulation circuit, coupled between the first to second PMOS transistors and the first to second NMOS transistors, that is configured to provide a first intermediate signal based on the first and second control signals. In some embodiments, the first intermediate signal has a first logic state corresponding to the first supply voltage and a second logic state corresponding to a second supply voltage that is a fraction of the first supply voltage.