Processor Core Voltage Adjustment for Multi-Core Yield
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Solution Overview
Problem
Multi-core processor chips face manufacturing yield issues due to within-chip processor process and performance variations, where individual cores may fail to meet specifications, causing the entire chip to fail even if most cores perform within specifications.
Innovation Solution
A method and system that adjust power supply voltages for each processor core to ensure they meet performance specifications, allowing the chip to operate within power and clock rate requirements by selecting appropriate voltages through iterative processes and using adjustable power supplies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single power supply voltage is used for all processor cores, then the chip design is simple and manufacturing is easier, but cores with different performance characteristics cannot meet specifications, causing the entire chip to fail
Solution Approach 1:
The patent segments the power supply system by providing individual adjustable power supplies for each processor core. This allows each core to receive a customized voltage level tailored to its specific performance characteristics, enabling cores with different performance levels to all meet their specifications simultaneously, thereby resolving the contradiction between chip reliability and power supply complexity.
Solution Approach 2:
The patent applies local quality by assigning different power supply voltages to different cores based on their individual performance characteristics. Each core receives a locally optimized voltage level that matches its specific capabilities, allowing heterogeneous cores to operate within specifications without requiring a uniform power supply across the entire chip.
2Reliability
If power supply voltage is increased to make underperforming cores meet specifications, then those cores can operate within specifications, but overall chip power consumption increases
Solution Approach 1:
The patent changes the power supply voltage parameter individually for each core based on its performance characteristics. By precisely adjusting each core's voltage to the minimum level required for specification compliance, the system avoids unnecessary power consumption while ensuring all cores meet their performance requirements, thus resolving the contradiction between reliability and energy efficiency.
3Ease of manufacture
If traditional testing methods are used where all cores must meet specifications at the same voltage, then testing is simple, but manufacturing yield decreases due to within-chip process variations
Solution Approach 1:
The patent introduces dynamic adaptability to the testing process by allowing each core to operate at its optimal voltage level during testing. This dynamic approach accommodates within-chip process variations by adjusting voltage per core rather than requiring all cores to meet specifications at a fixed voltage, thereby increasing manufacturing yield while maintaining testing feasibility.
4Productivity
If individual core performance variations are accommodated by adjusting each core's power supply, then manufacturing yield increases, but the complexity of power supply management and testing increases
Solution Approach 1:
The patent implements self-service by enabling each core to be independently characterized and configured with its optimal voltage level during the testing process. This automated per-core optimization increases manufacturing yield by accommodating performance variations, while the systematic approach to voltage assignment manages the complexity through structured testing and configuration procedures.
Data Source
AI summary
Systems, methods and program codes are provided for testing multi-core processor chip structures. Individual processor core power supply voltages are provided through controlling individual power supplies for each core, in one aspect to ensure that one or more cores operate at clock rates in compliance with one or more performance specifications. In one example, a first power supply voltage supplied to a first processing core differs from a second core power supply voltage supplied to a second processing core, both cores operating in compliance with a reference clock rate specification. Core power supply voltages may be selected from ordered discrete supply voltages derived by progressively raising or lowering a first supply voltage, optionally wherein the selected supply voltage also enables the core to operate within another performance specification.