Coreless Circuit Board Fabrication via Carrier Removal
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Solution Overview
Problem
Current circuit board manufacturing processes result in thick boards, low wiring density, high production costs, and complex steps, which hinder miniaturization and increase production time and costs due to the need for core layers and multiple drilling steps.
Innovation Solution
A method and structure for fabricating a circuit board without a core layer, using a metal carrier board with an insulating protective layer and conductive vias, where the carrier board is removed after forming dielectric and circuit layers, reducing thickness and simplifying production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a core layer is used in traditional circuit board manufacturing, then structural stability is improved, but board thickness increases and miniaturization is hindered
Solution Approach 1:
The patent removes the core layer from the circuit board structure, extracting only the essential support functions while eliminating the thickness constraint. The carrier board provides necessary structural stability without requiring a separate core layer, enabling thinner overall board design.
Solution Approach 2:
The patent employs thin film dielectric layers and flexible circuit board materials to achieve structural stability without thick core layers. The thin film structures provide sufficient mechanical support while maintaining minimal thickness for miniaturization applications.
2Reliability
If multiple drilling steps are performed to create through holes and vias, then wiring connectivity is improved, but production time and costs increase
Solution Approach 1:
The patent performs preliminary drilling of all through holes and vias in the carrier board before laminating dielectric layers. This preliminary action ensures all connectivity paths are established upfront, eliminating the need for subsequent drilling operations and reducing production time.
Solution Approach 2:
The patent combines multiple drilling operations into a single preliminary drilling step. By creating all necessary through holes and vias before layer lamination, the process merges what would otherwise be separate drilling steps into one efficient operation.
3Strength
If traditional core layer manufacturing is used, then structural support is improved, but production complexity and costs increase
Solution Approach 1:
The patent extracts the structural support function from the traditional core layer concept and transfers it to the carrier board itself. This eliminates the need for separate core layer manufacturing processes, reducing production complexity while maintaining structural support.
Solution Approach 2:
The carrier board serves multiple functions simultaneously: it provides structural support, acts as the base for drilling through holes and vias, and serves as the substrate for laminating dielectric layers. This multi-functionality eliminates the need for separate core layer components and simplifies the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces circuit board thickness, enhances wiring density, and decreases production costs and time, aligning with the trend towards miniaturization and improving electrical functionality.
Implementation Method 1
providing a carrier board made of metal
Implementation Method 2
forming an insulating protective layer on one surface of the carrier board
Implementation Method 3
forming a plurality of openings in the insulating protective layer to thereby expose parts of the carrier board
Implementation Method 4
forming a dielectric layer on the insulating protective layer and the circuit structure
Data Source
AI summary
A circuit board structure and a method for fabricating the same are proposed. The structure includes an insulating protective layer having a plurality of openings in which conductive vias are formed, a patterned circuit layer formed on the surface of the insulating protective layer and electrically connected to the conductive vias in the openings of the insulating protective layer, and a dielectric layer formed on the insulating protective layer and on the surface of the patterned circuit layer, wherein a plurality of openings are formed in the dielectric layer to thereby expose parts of the patterned circuit layer. Accordingly, the present invention reduces the thickness of a circuit board, which reduces package size, improves product performance, and conforms to the developmental trend toward smaller electronic devices.