Coreless Interposer Substrate via Copper Pillar Electroplating
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Solution Overview
Problem
The existing interposer substrate fabrication methods are complex, costly, and prone to conductivity issues due to the use of solder balls, which lead to bridging and short circuits, and are limited in thickness and line width/line space design, making them unsuitable for high-density packaging needs.
Innovation Solution
A coreless interposer substrate is fabricated using a carrier with a first insulating layer and conductive pillars, where external connection pillars are formed to connect the conductive pillars and wiring layers, eliminating the need for vias and additional conducting layers, thus simplifying the process and increasing conductivity and line density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If solder balls are used as supporting and electrically connecting members, then the package structure can be formed, but the distance between contacts must be decreased as the number of I/O increases, which causes bridging phenomenon and short circuits during reflowing
Solution Approach 1:
The patent replaces traditional solder balls with copper pillars that have a melting point higher than the reflow temperature. This allows the interposer substrate to be temporarily attached during assembly and then easily removed without damaging the copper pillars or causing bridging, effectively making the attachment process disposable while maintaining high reliability
Solution Approach 2:
The patent changes the material parameter of the connecting members from solder (low melting point) to copper (high melting point). This parameter change allows the distance between contacts to be decreased for higher I/O density without causing bridging during reflow, as copper does not melt at reflow temperatures
2Reliability
If copper pillars are used instead of solder balls to avoid bridging, then product yield increases, but additional conducting layers must be formed and removed, which complicates the fabrication process and may affect conductivity
Solution Approach 1:
The patent extracts and eliminates the additional conducting layers (such as nickel and gold layers) that were previously required for copper pillar formation. By using direct electroplating of copper without intermediate layers, the fabrication process is simplified while maintaining the high reliability and conductivity benefits of copper pillars
3Length of moving object
If the interposer substrate thickness is reduced to meet thin electronic product requirements, then the product becomes thinner, but the plate structure becomes vulnerable to damage
Solution Approach 1:
The patent uses a composite structure combining an organic interposer substrate with copper pillars. The organic substrate can be made thin while the copper pillars provide the necessary mechanical strength and electrical connectivity, allowing thin overall design without compromising durability
4Quantity of substance
If the line width and line space are reduced to increase circuit density, then more contacts can be accommodated, but the fabrication precision requirements increase
Solution Approach 1:
The patent replaces traditional mechanical drilling and plating of vias with a direct electroplating process that forms copper pillars through patterned photoresist. This substitution enables finer line widths and spaces because electroplating can achieve higher precision at smaller dimensions without the mechanical constraints of via drilling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs, avoids plate damage, and allows for finer line widths and spaces, enhancing the substrate's conductivity and reliability, making it suitable for high-density packaging applications.
Implementation Method 1
a copper pillar 14 is formed on the electrical contact pad 150 in an electroplating process
Data Source
AI summary
A method of fabricating an interposer substrate provides a carrier having a first wiring layer. The first wiring layer has a plurality of first conductive pillars. A first insulating layer is formed on the carrier. The first conductive pillars are exposed from the first insulating layer. External connection pillars are formed above the first conductive pillars and electrically connected to the first conductive pillars. Then the carrier is removed. The process of fabricating the via can be bypassed in the process by forming a coreless interposer substrate on the carrier, such that the overall cost of the process can be decreased, and the process is simple. The interposer substrate is also provided.