Coreless Package Structure Groove Embedding Method

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The manufacturing of miniaturized electronic devices with multiple functions faces challenges in creating efficient coreless package structures that effectively integrate components while maintaining reliability and scalability.

Innovation Solution

A method involving a supporting substrate with a copper foil, etching resist layer, and subsequent processing steps to form grooves, contact pads, and conductive bumps, ultimately resulting in a coreless package structure that embeds a chip with electrical connections, using laminating substrates and conductive patterns to facilitate bonding and removal of excess materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If coreless package structures with embedded components are used to accommodate miniaturized electronic products, then device miniaturization and functional integration are improved, but manufacturing complexity and process difficulty increase

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing process complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into distinct sequential stages: forming grooves in the copper foil, selectively removing copper to create contact pads, embedding chips in grooves, forming conductive bumps, and removing the supporting substrate. Each stage is independently controlled and optimized, allowing complex overall functionality to be achieved through manageable discrete steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The supporting substrate with copper foil and groove structures is prepared in advance before chip embedding. The grooves are pre-formed to receive chips, and the copper foil is pre-patterned with potential contact pad areas. This preliminary preparation enables subsequent steps to proceed more efficiently and with higher precision.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If supporting substrates with copper foil are used during manufacturing, then ease of manufacturing and process control are improved, but additional manufacturing steps for substrate removal are required

Engineering Contradiction:
Improveprocess controlVSAvoidmanufacturing efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The supporting substrate, which serves as a temporary manufacturing aid, is completely removed after the coreless package structure is formed. The copper foil and supporting layer are extracted from the final product, leaving only the essential functional components (chip, contact pads, conductive bumps, and packaging layer). This extraction enables easy manufacturing during the process while eliminating unnecessary elements in the final product.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The supporting substrate acts as an intermediary tool during manufacturing, providing a stable platform for forming grooves, contact pads, and conductive structures. It mediates between the manufacturing processes and the final coreless package structure, enabling precise control during fabrication while being completely removed afterward to achieve the desired coreless configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple processing steps are used to form grooves, contact pads, and conductive bumps, then component integration and electrical connection reliability are improved, but manufacturing time and process duration increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Multiple functions are combined into integrated structures: the grooves serve both as mechanical holders for chips and as pathways for conductive connections. The contact pads are formed by selective copper removal rather than separate deposition processes. Conductive bumps are formed by electroplating that simultaneously creates both the conductive path and the mechanical connection feature. These merged approaches reduce the number of discrete manufacturing steps while maintaining high reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The copper foil serves multiple functions throughout the manufacturing process: it provides the base material for contact pads, serves as the conductive material source, and acts as a structural support during fabrication. The grooves simultaneously provide mechanical chip retention and electrical connection pathways. This multi-functionality reduces the need for separate specialized components and processes, thereby reducing manufacturing time while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the creation of reliable, scalable coreless package structures that efficiently integrate components, enhancing the manufacturing of miniaturized electronic devices by ensuring robust electrical connections and compact design.

Implementation Method 1

the first copper foil is removed to expose the contact pads and to release the chip

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

a plurality of contact pads are formed on the portions of the first copper foil exposed from the first plating resisting film

Methodology Applied
Scientific EffectPlating: Electroplating

Data Source

PatentUS9362248B2Coreless package structure and method for manufacturing same
Publication Date: 2016.06.07 LEADING INTERCONNECT SEMICONDUCTOR TECHNOLOGY QINHUANGDAO CO LTD
  • US9362248B2 patent drawing
  • US9362248B2 patent drawing
  • US9362248B2 patent drawing

AI summary

A coreless package structure and a method for manufacturing same includes the steps of providing a supporting substrate comprising an etching resist layer and a copper foil. A groove is defined in the copper foil and a plurality of contact pads are formed on the surface of the copper foil. A chip including a plurality of electrode pads is received in the groove and a packaging layer is formed on a side of the copper foil. An insulating layer and a conductive pattern layer are formed on the packaging layer in that order, the conductive pattern layer being electrically connected to the contact pads and the electrode pads by a plurality of conductive bumps. Finally, the etching resist layer and the copper foil are removed to obtain a coreless package structure.