Coreless Substrate Package Layout With Stiffener Ring Warpage Control
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Solution Overview
Problem
Conventional semiconductor packaging with a core substrate material increases package thickness, leading to longer routing distances and profile issues, and challenges in warpage control for coreless substrates.
Innovation Solution
A coreless substrate package design featuring a silicon die mounted on a substrate without a permanent core, using insulating and conductive layers, underfill and gap fill materials, and a stiffener ring for warpage control, with C4 bumps and BGA balls for electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a core substrate material is used, then the package substrate provides structural support and routing capability, but the package thickness increases and routing distance becomes longer
Solution Approach 1:
The patent removes the core substrate material from the package structure, extracting only the essential functions (structural support and routing) and implementing them through alternative means: a substrate without core material, with conductive traces formed directly on the substrate surface and insulating layers providing necessary support, thereby reducing thickness while maintaining functionality
Solution Approach 2:
The patent segments the substrate structure into distinct functional layers: insulating layers, conductive trace layers, and optional reinforcement elements, allowing each layer to perform its specific function independently without requiring a thick core material, thus achieving thin profile with adequate structural support
2Ease of operation
If a core substrate material is used, then the package substrate provides routing capability, but the routing distance between upper layers and lower signal layers becomes longer
Solution Approach 1:
The patent extracts the routing function from the core substrate and implements it through surface-level conductive traces and vias, eliminating the need for signals to traverse through the thickness of a core material, thereby significantly reducing routing distance while maintaining full routing capability
Solution Approach 2:
The patent transitions routing from a three-dimensional path through core layers to a primarily two-dimensional path on the substrate surface, using conductive traces and vias that minimize vertical traversal, thus reducing routing distance while preserving connectivity between layers
3Length of stationary object
If a coreless substrate is used, then the package thickness is reduced and profile is thinner, but warpage control becomes challenging
Solution Approach 1:
The patent employs composite material structures combining substrate material with insulating layers and conductive traces, where the combination of materials with different mechanical properties provides both thin profile and warpage resistance through material composition rather than core thickness
Solution Approach 2:
The patent segments the substrate into multiple thin functional layers (insulating layers, conductive trace layers) that can be independently optimized, allowing the overall structure to achieve thin profile while the distributed layer structure provides warpage control through balanced stress distribution
Data Source
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AI summary
A coreless substrate package (1) includes a coreless substrate (20); a package device (10) mounted on the coreless substrate (20); an underfill material (310) filling into a space between the package device (10) and the coreless substrate (20); a stiffener ring (40) disposed on a top surface (20a) of the coreless substrate (20) along perimeter of the coreless substrate (20); and a gap fill material (50) disposed in a gap between the stiffener ring (40) and the package device (10).