Coreless PCB Cavity Fabrication for Fine Pitch Interconnects
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Solution Overview
Problem
Stacked package architectures face z-height limitations and scaling issues due to large solder balls required for PoP interconnects, limiting the feasible PoP pitch, and existing cavity fabrication processes are hindered by laser stop layers, accuracy issues, and residue from release layers.
Innovation Solution
A coreless architecture using laser skiving and trimming to form cavities without a stop layer, allowing for fine routing and embedded traces on the first level interconnect layer, and eliminating the need for a release layer to achieve tighter cavity dimensions and finer pitch capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional cavity fabrication processes using laser trimming and skiving are used, then cavities can be formed, but laser stop layers are required which prevent fan-out routing and create keep-out zones
Solution Approach 1:
The patent removes the laser stop layer from the cavity fabrication process entirely. By using laser skiving and trimming without a stop layer, the method eliminates the constraint that prevents fan-out routing, thereby resolving the contradiction between ease of manufacture and routing versatility.
Solution Approach 2:
The patent performs preliminary routing of traces into and out of the cavity region before cavity formation. This preliminary action allows traces to be positioned in areas that will become the cavity, enabling fan-out routing without requiring a stop layer, thus resolving the contradiction.
2Ease of manufacture
If release layers are used to assist with cavity material removal, then cavity formation is facilitated, but residue is left behind which creates issues with subsequent processing
Solution Approach 1:
The patent removes the release layer from the process entirely. By using laser skiving and trimming directly on the substrate without a release layer, the method eliminates residue contamination, resolving the contradiction between ease of manufacture and manufacturing precision.
3Length of stationary object
If large solder balls are used for PoP interconnects to provide standoff height, then die thickness requirements are met, but PoP pitch scaling is limited
Solution Approach 1:
The patent transitions from vertical stacking (PoP architecture requiring large solder balls for standoff) to a planar cavity-based architecture where components are embedded in the substrate plane. This dimensional change allows finer pitch interconnects while maintaining adequate standoff through the cavity structure rather than large solder balls.
Solution Approach 2:
The patent embeds components and traces within the substrate cavity, creating a nested structure where interconnects are routed within the substrate itself. This nesting allows for finer pitch interconnects while the cavity provides the necessary standoff height, resolving the contradiction between standoff requirements and pitch scaling.
4Manufacturing precision
If cavity drilling accuracy limits are considered, then a large keep-out zone is required around the cavity, but this reduces routing flexibility
Solution Approach 1:
The patent performs preliminary routing of traces into the cavity region before cavity formation. By pre-positioning traces in the eventual cavity area, the method eliminates the need for keep-out zones, as the traces are already routed to their destinations and the cavity is formed around them, resolving the contradiction between drilling accuracy and routing flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces z-height, enables finer pitch interconnects, and allows for denser routing without the drawbacks of traditional cavity fabrication processes, such as keep-out zones and residue issues, facilitating more compact and efficient packaging.
Implementation Method 1
laser skiving and trimming to form cavities
Data Source
AI summary
An apparatus is provided which comprises: a cavity made in a substrate of a printed circuit board (PCB); a plurality of solder balls embedded in the cavity; and a horizontal trace within the substrate, wherein the horizontal trace is partially directly under the plurality of solder balls and is coupled to the plurality of solder balls and another trace or via in the substrate such that a substrate region under the plurality of solder balls is independent of a stop layer under the cavity.


