Coreless Printed Circuit Board Warpage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge is to create a printed circuit board that achieves a thin thickness and high wiring density while reducing warpage and enabling easy embedding of electronic components, which existing technologies struggle to accomplish due to limitations in substrate design and material rigidity.
Innovation Solution
A coreless substrate with insulating material is used as the core structure, featuring through-openings for electronic component embedding and build-up wiring layers on both sides, utilizing different materials for core and build-up insulating layers to enhance rigidity and support high-density circuit formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a coreless substrate with insulating material is used as the core structure, then warpage is reduced and rigidity is improved, but the complexity of manufacturing increases due to the need for through-openings and build-up wiring layers
Solution Approach 1:
The substrate is divided into multiple functional layers: core insulating layers, primer layers, build-up insulating layers, and wiring layers. This segmentation allows each layer to be optimized independently for its specific function, reducing overall warpage while maintaining manufacturing feasibility through standardized layering processes
Solution Approach 2:
The structure employs nested layers where build-up insulating layers and wiring layers are constructed upon the core substrate. The primer layers are embedded within the core insulating layers, creating a nested configuration that enhances rigidity and reduces warpage without requiring complex external support structures
2Adaptability or versatility
If through-openings are formed in the core structure to embed electronic components, then component embedding capability is improved, but structural integrity and rigidity deteriorate
Solution Approach 1:
The core insulating layers are designed with different thicknesses in different regions: thicker regions maintain structural integrity and rigidity, while localized thinner regions or controlled openings enable electronic component embedding. This local quality variation allows simultaneous achievement of structural strength and component embedding capability
Solution Approach 2:
The substrate uses composite material structures combining different insulating materials with varying mechanical properties. The core insulating layers and build-up insulating layers use different materials optimized for their specific locations, providing both structural support and embedding functionality without compromising overall integrity
3Length of moving object
If the substrate thickness is reduced to achieve thinner devices, then device miniaturization is improved, but warpage control and structural stability worsen
Solution Approach 1:
The patent optimizes the thickness parameters of individual layers rather than uniformly reducing overall substrate thickness. The core insulating layers maintain sufficient thickness for structural stability, while the build-up layers provide functional wiring density. This parameter optimization allows thin overall profile with controlled warpage
Solution Approach 2:
Different insulating materials with complementary mechanical properties are used in the core and build-up layers. The core insulating material provides dimensional stability and warpage control, while the build-up insulating material enables high-density wiring in thinner profiles, achieving both miniaturization and stability
4Productivity
If wiring density is increased to achieve higher functionality, then device functionality is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent transitions from planar wiring to three-dimensional build-up wiring layers stacked vertically. This dimensional change allows high wiring density to be achieved through vertical stacking rather than horizontal cramming, reducing the manufacturing precision requirements for lateral wiring spacing while maintaining high functionality
Data Source
AI summary
A printed circuit board includes a coreless substrate including an insulating body and a plurality of core wiring layers disposed on or within the insulating body, a build-up insulating layer covering at least a portion of each of an upper surface and a lower surface of the coreless substrate, and a build-up wiring layer disposed on at least one of an upper surface and a lower surface of the build-up insulating layer. A through-opening penetrates through the insulating body and is configured to receive an electronic component therein, and the first build-up insulating layer extends into the through-opening to embed the electronic component.


