Coreless Substrate Bumpless Build-Up Layer Electromagnetic Noise Shielding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor microelectronic device packaging technologies face challenges in efficiently managing electromagnetic noise and achieving high-density interconnects without the use of bumps, while maintaining structural integrity and scalability for complex systems like smartphones.
Innovation Solution
The development of a coreless substrate with a bumpless build-up layer (BBUL-C) package that incorporates inter-layer metallization as a shielding structure to sequester electromagnetic noise and features a ball-grid pad array, allowing for the integration of multiple devices with electrical bumps for standoff and additional stiffness, enabling high-density interconnects and system-in-package designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional packaging structures with bumps are used, then structural support is achieved, but electromagnetic noise increases and manufacturing complexity increases
Solution Approach 1:
The invention removes the traditional bump structure from the packaging system, extracting the harmful element that causes electromagnetic noise and mechanical stress. The bumpless build-up layer replaces the bump's structural function through a planarized dielectric and metallization structure, eliminating the source of electromagnetic interference while maintaining structural support.
Solution Approach 2:
The invention introduces an intermediary bumpless build-up layer structure consisting of dielectric material and metallization layers. This intermediary structure mediates between the substrate and the device, providing mechanical support and electrical interconnection without using traditional bumps, thereby reducing electromagnetic noise while maintaining structural integrity.
2Quantity of substance
If high-density interconnects are implemented, then integration density increases, but manufacturing precision requirements increase
Solution Approach 1:
The invention transitions from two-dimensional planar interconnects to three-dimensional vertically stacked metallization layers within the bumpless build-up structure. This dimensional change allows high-density interconnects to be achieved through vertical stacking rather than horizontal scaling, reducing the alignment precision requirements for each individual layer while maintaining overall high density.
3Volume of moving object
If compact package design is used, then device integration increases, but heat dissipation becomes more difficult
Solution Approach 1:
The invention utilizes the bumpless build-up layer structure with its inherent voids and porous dielectric material to facilitate heat dissipation. The porous structure provides thermal pathways through which heat can be conducted away from the integrated devices, enabling effective heat management within the compact package volume without requiring additional heat sink structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces electromagnetic noise interference, enhances structural stiffness, and supports high-volume production of complex electronic devices like smartphones by integrating multiple processing, memory, and RF functions within a compact, bumpless package.
Implementation Method 1
incorporates inter-layer metallization as a shielding structure to sequester electromagnetic noise
Implementation Method 2
electrical bumps for standoff and additional stiffness
Data Source
Figure 1a~1b
Figure 1c~1d
Figure 2
AI summary
An apparatus includes a coreless substrate with an embedded die that is integral to the coreless substrate, and at least one device assembled on a surface that is opposite to a ball-grid array disposed on the coreless substrate. The apparatus may include an over-mold layer to protect the at least one device assembled on the surface.