Coreless Package Substrate Dual Solder Resist Layers

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Solution Overview

Problem

Conventional coreless package substrates with a single solder resist layer are limited in integrating fine-pitched device components on both sides, as they can only have narrow contact pads on one side, restricting the integration of active/passive device components with varying pitch requirements.

Innovation Solution

The implementation of dual solder resist layers on both the top and bottom sides of the coreless package substrate allows for the formation of narrow contact pads on both sides, enabling integration of fine-pitched device components by preventing pad-to-pad bridging and allowing selective tuning of surface finish plating thicknesses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single solder resist layer is used on coreless package substrates, then the structure is simple and manufacturing is easier, but narrow contact pads can only be formed on one side, limiting integration of fine-pitched device components on both sides

Engineering Contradiction:
Improveintegration capability on both sidesVSAvoidsolder resist layer structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The solder resist layer is segmented into two separate layers: a first solder resist layer on the top side and a second solder resist layer on the bottom side. This segmentation allows each layer to independently define narrow contact pads on its respective side, enabling fine-pitched device component integration on both sides while maintaining manufacturing feasibility through standardized lamination processes.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If narrow contact pads are formed on one side only, then manufacturing is simpler, but the substrate cannot accommodate fine-pitched device components on both sides with varying pitch requirements

Engineering Contradiction:
Improvecompatibility with fine-pitched componentsVSAvoidcontact pad formation process
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Each solder resist layer is applied locally to specific regions requiring narrow contact pads. The first solder resist layer covers the top side where fine-pitched components are mounted, and the second solder resist layer covers the bottom side for corresponding fine-pitched components. This local quality approach allows narrow contact pads to be formed only where needed on each side, while broader areas can maintain wider pads for different pitch requirements, optimizing both adaptability and manufacturing ease.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If dual solder resist layers are implemented, then narrow contact pads can be formed on both sides preventing pad-to-pad bridging, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvecontact pad definition accuracyVSAvoidsolder resist layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The first solder resist layer is applied and cured before forming the bottom contact pads, establishing a precise reference pattern that prevents pad-to-pad bridging. Subsequently, the second solder resist layer is applied to the bottom side after the intermediate structure is formed. This preliminary action sequence ensures that each solder resist layer defines narrow contact pads with high precision before subsequent layers are added, maintaining manufacturing precision while managing complexity through sequential processing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11443970B2Methods of forming a package substrate
Publication Date: 2022.09.13 TAHOE RES LTD
  • US11443970B2 patent drawing
  • US11443970B2 patent drawing
  • US11443970B2 patent drawing

AI summary

A coreless package substrate with dual side solder resist layers is disclosed. The coreless package substrate has a top side and a bottom side opposite of the top side and includes a single build-up structure formed of at least one insulating layer, at least one via, and at least one conductive layer. The coreless package substrate also includes a bottom plurality of contact pads on the bottom side, and a top plurality of contact pads on the top side. A bottom solder resist layer is on the bottom side, and a top solder resist layer is on the top side. The concept of dual side solder resist is extended to packages with interconnect bridge with C4 interconnection pitch over a wide range.