Coreless Transformer Packaging for Compact Galvanic Isolation
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Solution Overview
Problem
Conventional transformer arrangements face challenges in achieving space-saving designs while maintaining reliable signal transmission and galvanic isolation between electronic circuits, particularly when integrated into semiconductor chips.
Innovation Solution
A transformer arrangement featuring an electrically insulating carrier with a coreless transformer and integrated circuits, where the transformer windings are inductively coupled and embedded or arranged on the carrier, allowing for independent design and packaging similar to a single semiconductor die, enabling space-saving implementation without compromising signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the transformer is formed on top of a semiconductor chip to save space, then the space utilization is improved, but the minimum size of the semiconductor die is constrained by the desired size of the transformer windings
Solution Approach 1:
The transformer arrangement is segmented into two independent parts: the transformer component and the semiconductor die component. Each can be manufactured separately with optimal dimensions, then packaged together in a single package. This eliminates the constraint where the semiconductor die size must accommodate the transformer windings, as they are no longer physically integrated in a fixed spatial relationship.
Solution Approach 2:
The solution transitions from a two-dimensional planar integration (transformer on top of die) to a three-dimensional packaging arrangement where both components coexist in the same package but with independent spatial freedom. This allows the semiconductor die to be shrunk to minimum technology-driven sizes while the transformer maintains its required winding dimensions elsewhere in the package volume.
2Reliability
If the transformer windings are made larger to achieve reliable signal transmission, then the signal transmission reliability is improved, but the overall size of the transformer arrangement increases
Solution Approach 1:
The transformer and semiconductor die are merged into a single integrated package, allowing the transformer windings to be optimized for signal transmission reliability with sufficient size, while the overall arrangement remains compact due to the shared package enclosure. The package provides a unified structure that accommodates both components at optimal sizes without requiring external mounting.
3Productivity
If the semiconductor die is shrunk to minimum size using advanced technology, then the productivity and integration density are improved, but the transformer windings cannot be properly formed on top of the small die
Solution Approach 1:
By segmenting the transformer and semiconductor die into separate manufacturable units, the semiconductor die can be produced using advanced miniaturization technologies to achieve high integration density, while the transformer is manufactured separately with traditional winding techniques that require larger space. Both are then assembled in the final package, eliminating the manufacturing conflict.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for compact integration of transformer arrangements with galvanic isolation, enabling efficient signal transmission and reducing the size constraints of semiconductor dies, while maintaining reliable electrical isolation and connectivity.
Implementation Method 1
a transformer including a first winding and a second winding that are inductively coupled
Data Source
AI summary
A transformer arrangement is disclosed. The transformer arrangement includes: an electrically insulating carrier; a first integrated circuit including a first semiconductor die embedded in or arranged on top of the electrically insulating carrier; and a transformer including a first winding and a second winding that are inductively coupled. One of the first and second windings is connected to the first integrated circuit, and each of the first and second windings is embedded in or arranged on top of the electrically insulating carrier.