CORESET Timing Alignment via Extended Cyclic Prefix

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Solution Overview

Problem

Wireless communication systems face timing resolution limitations due to synchronization signal blocks (SSB) with smaller subcarrier spacing (SCS), which affect the alignment and detection of control resource sets (CORESETs), leading to difficulties in refining timing adjustments and determining symbol boundaries.

Innovation Solution

The technique involves aligning the start time of CORESETs with symbols having larger cyclic prefixes (CP) than others in the same half-subframe, allowing user equipment (UE) to refine timing adjustments after detecting an SSB, and transmitting PDCCH in these aligned CORESETs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SSB with smaller subcarrier spacing is used, then coverage and synchronization capability are improved, but timing resolution deteriorates

Engineering Contradiction:
Improvesynchronization capabilityVSAvoidtiming resolution
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces an extended cyclic prefix as an intermediary element between the SSB and normal symbols. This extended CP acts as a mediator that provides a clear timing reference point (its boundary) without requiring the SSB itself to have high timing resolution. The extended CP bridges the gap between the low-resolution SSB detection and the high-precision timing requirements of subsequent communications.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary timing alignment by aligning the CORESET start time with the extended CP boundary before actual data transmission begins. This preliminary action establishes a accurate timing reference in advance, allowing the UE to refine its timing adjustment based on the known extended CP position rather than relying solely on the lower-resolution SSB timing.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If CORESET start time is not aligned with extended CP boundary, then flexibility in resource allocation is maintained, but timing ambiguity increases

Engineering Contradiction:
Improveresource allocation flexibilityVSAvoidtiming accuracy
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The patent applies local quality by creating a special timing reference point at the extended CP boundary with high timing precision properties. While the overall resource allocation maintains flexibility, the specific location where CORESET starts is anchored to the extended CP boundary, creating a local zone of high timing accuracy without compromising global system flexibility.

Inventive Principle:
Principle #3Local quality

3Device complexity

If timing adjustment refinement is performed without extended CP alignment, then system complexity is reduced, but symbol boundary detection accuracy deteriorates

Engineering Contradiction:
Improvetiming refinement complexityVSAvoidsymbol boundary detection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The extended cyclic prefix serves a dual purpose: it maintains backward compatibility with existing systems while simultaneously providing its own boundary as a timing reference. The extended CP essentially serves itself by creating a natural timing anchor point that both preserves legacy functionality and enables improved timing detection without requiring additional complex mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4144024B1Method and apparatus to mitigate timing resolution limitation due to SSB with smaller scs
Publication Date: 2024.12.04 QUALCOMM INC
  • EP4144024B1 patent drawingFigure 1
  • EP4144024B1 patent drawingFigure 2
  • EP4144024B1 patent drawingFigure 3

AI summary

Aspects of the present disclosure relate to wireless communications, and more particularly, to techniques for mitigating timing resolution limitations due to synchronization signal blocks (SSBs) with low subcarrier spacing (SCS). An example method by a user equipment (UE) generally includes detecting a SSB; determining a start time of a control resource set (CORESET) associated with the detected SSB, wherein the start time of the CORESET is aligned with a boundary of a symbol having a larger cyclic prefix (CP) than one or more other symbols in a same half-subframe; and monitoring the CORESET for a physical downlink control channel (PDCCH) transmission.