Corner-Reinforced Ball Grid Array for PCB Warpage Relief
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Solution Overview
Problem
The attachment of semiconductor packages with ball grid arrays (BGAs) on printed circuit boards (PCBs) often results in warping and deformation due to differences in thermal expansion coefficients, leading to cracked or broken solder balls and potential short or open circuits.
Innovation Solution
The implementation of a semiconductor structure with a ball grid array that includes first and second solder balls of different sizes, where the second solder balls are larger and located at the corners, providing enhanced mechanical interconnection and thermal management without altering the package's external dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If uniform-sized solder balls are used in the ball grid array, then the manufacturing process is simple, but the mechanical interconnection strength is insufficient and warping problems occur due to thermal expansion differences
Solution Approach 1:
The patent applies local quality by differentiating the solder ball sizes based on their positions in the ball grid array. Corner positions use larger solder balls (second size) while edge and internal positions use smaller solder balls (first size). This local differentiation strengthens the mechanical interconnection at critical corner positions that are most susceptible to warping and thermal stress, while maintaining simplicity in other areas.
Solution Approach 2:
The patent introduces asymmetry by using non-uniform solder ball sizes instead of uniform sizes throughout the array. The asymmetric distribution with larger balls at corners and smaller balls elsewhere creates a structure that better compensates for thermal expansion differences, improving mechanical strength without requiring complete redesign of the entire array.
2Strength
If larger solder balls are used throughout the ball grid array, then mechanical interconnection strength improves, but the package external dimensions increase
Solution Approach 1:
Instead of uniformly increasing solder ball size across the entire array, the patent applies local quality by restricting larger solder balls (second size) only to corner positions where mechanical strength is most critical for preventing warping. Edge and internal positions use smaller solder balls (first size), thereby achieving improved strength at key locations without increasing the overall package external dimensions.
3Temperature
If the ball grid array structure is modified to improve thermal management, then heat dissipation capability enhances, but the manufacturing complexity increases
Solution Approach 1:
The patent improves heat dissipation through local quality by placing larger solder balls (second size) at corner positions which are critical for thermal management, while using smaller solder balls (first size) in edge and internal positions. This localized approach enhances thermal conductivity where most needed without requiring complex manufacturing process changes across the entire array.
Solution Approach 2:
The patent applies parameter changes by modifying the size parameter of solder balls at specific positions rather than changing the entire array configuration. The two different sizes (first and second sizes) create varying thermal pathways that improve heat dissipation from the semiconductor device, while the modification remains within existing manufacturing capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly improves the mechanical interconnection between semiconductor devices and PCBs, reduces mechanical interconnection failures in temperature-changing environments, and enhances the heat dissipation capability of the semiconductor package.
Implementation Method 1
warping problems on different parts of the structure may occur due to the differences in the coefficients of thermal expansion (CTE) of different materials of different parts of the structure
Implementation Method 2
enhances the heat dissipation capability of the semiconductor package
Data Source
AI summary
A semiconductor structure, a fabricating method thereof, and a chip packing structure are provided. The disclosed semiconductor structure includes a printed circuit board, a chip packing structure, and a ball grid array connected between the printed circuit board and the chip packing structure. The ball grid array includes first solder balls each having a first lateral size, and second solder balls each having a second lateral size greater than the first lateral size. The second solder balls are located at corners of the ball grid array, respectively.


