Corner Conduction Loops for Crack Detection in Semiconductor Dies
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in accurately detecting cracks during the manufacturing process, leading to reduced yield of defective products.
Innovation Solution
A defect detection structure is implemented in the peripheral region of semiconductor dies, comprising multiple conduction loops in specific corner regions, which applies a test input signal and determines defect existence and location based on output signals from these loops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional inspection methods are used to detect cracks in semiconductor dies, then the manufacturing process is simple, but the detectability of crack penetration is insufficient leading to reduced yield
Solution Approach 1:
The defect detection structure is segmented into multiple conduction loops positioned at different corner regions (left-bottom, right-bottom, left-upper, right-upper) of the peripheral region. Each conduction loop independently detects cracks in its specific region, allowing comprehensive coverage while maintaining modular simplicity in the overall design.
Solution Approach 2:
The conduction loops are pre-positioned in the peripheral region before the cutting and packaging processes. This preliminary placement enables the detection structure to be ready for crack detection before defects occur, allowing immediate detection when cracks penetrate through the corner regions during subsequent manufacturing steps.
2Measurement precision
If multiple conduction loops are added in the peripheral region to enhance crack detection, then detectability of various crack types is improved, but the device structure becomes more complex
Solution Approach 1:
Each conduction loop is specifically positioned in a corner region of the peripheral area, giving different locations different detection functions. The left-bottom loop detects cracks in the left-bottom corner, the right-bottom loop detects right-bottom corner cracks, and so on. This local specialization enables precise determination of defect locations while using a manageable number of loops.
Solution Approach 2:
Multiple conduction loops are merged into a single defect detection structure that shares common input-output circuits and detection logic. The loops are electrically connected to the same input-output circuitry, allowing them to function as an integrated system rather than separate independent structures, thereby reducing overall complexity.
3Reliability
If conduction loops are positioned in corner regions to detect crack penetration, then detectability of crack penetration is enhanced, but the area available for other circuit functions is reduced
Solution Approach 1:
The conduction loops are positioned only in the corner regions of the peripheral area, utilizing only the necessary portions of the peripheral region for detection purposes. This partial use of the peripheral area leaves the central and intermediate peripheral regions available for other circuit functions, achieving adequate crack detection coverage without excessive area consumption.
Data Source
AI summary
A semiconductor device includes a semiconductor die, a defect detection structure and an input-output circuit. The semiconductor die includes a central region and a peripheral region surrounding the central region. The peripheral region includes a left-bottom corner region, a left-upper corner region, a right-upper corner region and a right-bottom corner region. The defect detection structure is formed in the peripheral region. The defect detection structure includes a first conduction loop in the left-bottom corner region, a second conduction loop in the right-bottom corner region, a third conduction loop in the left-bottom corner region and the left-upper corner region and a fourth conduction loop in the right-bottom corner region and the right-upper corner region. The input-output circuit is electrically connected to end nodes of the first conduction loop, the second conduction loop, the third conduction loop and the fourth conduction loop.


