Array Substrate Corner Fan-Out Routing for Narrow-Bezel Displays
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Solution Overview
Problem
Conventional display panel designs face challenges in achieving a narrow bezel due to the increased number of data signal lines, which compresses wiring space and occupies space in the non-display region, making it difficult to maintain a high screen-to-body ratio and circuit stability.
Innovation Solution
The proposed solution involves an array substrate with a base substrate that includes a display region and a non-display region, where the first fan-out wires are strategically connected to data signal lines in the corner display region and extended to the middle display region, reducing wiring space and achieving a narrow bezel by laying out fan-out lines within the display region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DDL design is adopted to improve circuit stability, then circuit stability is improved, but the number of data signal lines increases, compressing wiring space and making narrow bezel difficult to achieve
Solution Approach 1:
The patent transitions fan-out wires from the traditional non-display region (one dimension) into the display region (another dimension). By routing fan-out wires through the corner display region and middle display region, the design utilizes the display region as an additional spatial dimension for wiring, thereby reducing the bezel area while accommodating the increased number of data signal lines required for DDL design
Solution Approach 2:
The patent applies different wiring strategies to different regions: fan-out wires are routed through the corner display region and middle display region rather than uniformly through the non-display region. This localized approach to wiring distribution optimizes space utilization in specific areas, reducing the overall bezel area while maintaining circuit stability through DDL design
2Adaptability or versatility
If multiplexer circuit is added at the R corner below the display region, then circuit functionality is improved, but the wiring space of fan-out wires is compressed and the bezel becomes large
Solution Approach 1:
The patent extracts the fan-out wire routing from the non-display region (specifically the R corner area) and relocates it into the display region. By taking out the fan-out wire path from the bezel area and placing it within the display region, the design reduces the bezel width while maintaining the multiplexer circuit's functionality for signal routing
3Ease of manufacture
If fan-out lines are laid out in the non-display region, then wiring organization is simplified, but the effective display ratio is reduced and the bezel is large
Solution Approach 1:
The patent utilizes the corner display region and middle display region as alternative routing paths for fan-out wires. By changing the routing dimension from the non-display region to specific areas within the display region, the design maintains wiring organization while increasing the effective display ratio and reducing the bezel area
Data Source
AI summary
An array substrate includes a base substrate having a display region and a non-display region, the display region includes a corner display region and a middle display region; the display region includes a plurality of pixel circuits arranged in an array and a plurality of data signal lines, and a column of pixel circuits are electrically connected to at least two data signal lines; and further includes a plurality of first fan-out wires, where a first terminal of a first fan-out wire of the plurality of first fan-out wires is electrically connected to a data signal line located in the corner display region; the non-display region includes a fan-out region, and the fan-out region includes a plurality of second fan-out wires; a terminal of a second fan-out wire of part of the plurality of second fan-out wires is electrically connected to the second terminal of the first fan-out wire.


