Corrugated BEOL Capacitor Structure for Low-Temperature Integration
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Solution Overview
Problem
The semiconductor industry faces challenges in integrating capacitor structures without damaging previously fabricated devices due to the need for low-temperature processing in back-end-of-line (BEOL) integration, as existing materials and processes may not be compatible with front-end-of-line (FEOL) and middle end-of-line (MEOL) devices.
Innovation Solution
A capacitor structure is developed that includes a support structure with an alternating dielectric stack and electrodes, processed at low temperatures, allowing integration with thin film transistors (TFTs) without damaging FEOL and MEOL devices, using materials like silicon oxide and high-k dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional capacitor materials and processes are used in BEOL integration, then capacitor functionality is achieved, but previously fabricated FEOL and MEOL devices are damaged due to high processing temperatures
Solution Approach 1:
The patent changes the material parameters of the capacitor structure by using oxide semiconductor materials (such as IGZO - indium gallium zinc oxide) that enable low-temperature processing. This allows the capacitor to be fabricated at temperatures compatible with previously formed FEOL and MEOL devices, resolving the contradiction between achieving capacitor functionality and protecting existing devices from thermal damage
Solution Approach 2:
The patent employs composite material structures including oxide semiconductor layers combined with other dielectric materials (such as silicon oxide, silicon nitride) to create a capacitor that achieves the required electrical properties at low processing temperatures. The composite approach allows each material to contribute its specific properties while maintaining overall compatibility with low-temperature BEOL processes
2Reliability
If low-temperature processing is used for BEOL integration, then previously fabricated devices are protected, but integration density and performance are limited
Solution Approach 1:
The patent changes the material composition parameters to use oxide semiconductors with tunable electrical properties. By adjusting the stoichiometry and composition of materials like IGZO, the patent achieves both low-temperature processability and high-performance characteristics necessary for increased integration density, thus resolving the contradiction between device protection and productivity enhancement
Solution Approach 2:
The patent transitions to thin-film transistor (TFT) based capacitor structures with vertically stacked configurations. This dimensional change from planar to three-dimensional architectures enables higher integration density by utilizing vertical space, while the thin-film nature of the oxide semiconductor materials maintains compatibility with low-temperature processing requirements
Data Source
AI summary
A disclosed capacitor structure includes a support structure including a plurality of elongated structures each extending along a longitudinal direction, a transverse direction, and a vertical direction. The plurality of elongated structures includes an alternating stack of first dielectric layers and second dielectric layers, a bottom electrode formed over the support structure, a third dielectric layer formed over the bottom electrode, and a top electrode formed over the third dielectric layer. Each of the first dielectric layers includes a first width along the transverse direction and each of the second dielectric layers includes a second width along the transverse direction. In various embodiments, the first width may be less than the second width such that each of the plurality of elongated structures include walls including a corrugated width profile as a function of distance along the vertical direction. The capacitor structure may be formed in a BEOL process.