Corrugated Semiconductor Leads for High I/O Density

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Solution Overview

Problem

Conventional lead frames for surface mount packaging are limited in accommodating an increasing number of input/output pads on semiconductor dies, as increasing the number of leads either enlarges the package size or shrinks the lead size, which is undesirable.

Innovation Solution

A lead frame with corrugated leads is developed, where each lead frame site has a flag portion and corrugated leads extending from it, allowing multiple wire bonds to connect to I/O pads on the semiconductor die, and the leads are encapsulated and then separated to form individual packages, enabling more I/O connections without increasing package size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of leads around the die is increased to accommodate more I/O pads, then the number of I/O connections is improved, but the package size increases

Engineering Contradiction:
Improvenumber of I/O connectionsVSAvoidpackage size
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The lead frame structure transitions from a conventional planar arrangement to a three-dimensional configuration by adding vertical height through stacked lead frames. Multiple lead frames are stacked vertically with corresponding leads aligned, allowing multiple I/O connections to be achieved within the same footprint area by utilizing the vertical dimension rather than expanding horizontally.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the number of leads around the die is increased to accommodate more I/O pads, then the number of I/O connections is improved, but the lead size decreases

Engineering Contradiction:
Improvenumber of I/O connectionsVSAvoidlead size
Core Design Contradiction:
Quantity of substanceVSLength of moving object

Solution Approach 1:

Multiple lead frames are stacked and merged vertically, with corresponding leads from each frame aligned and combined. This merging approach allows the system to achieve a high number of I/O connections while each individual lead maintains its original size and structural integrity, as the leads are combined in the vertical dimension rather than being distributed across a larger horizontal area.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10134660B2Semiconductor device having corrugated leads and method for forming
Publication Date: 2018.11.20 NXP USA INC
  • US10134660B2 patent drawing
  • US10134660B2 patent drawing
  • US10134660B2 patent drawing

AI summary

A semiconductor device includes a lead frame site including a die attach region and corrugated metal leads around the die attach region. Each of the corrugated metal leads includes two or more corrugations. Each of the two or more corrugations includes a first flat horizontal portion, a first vertical portion with a first end directly adjacent and connected to a first end of the first flat horizontal portion, a second flat horizontal portion with a first end directly adjacent and connected to a second end of the first vertical portion, and a second vertical portion with a first end directly adjacent and connected to a second end of the second flat horizontal portion. The first flat horizontal portion is in a different plane than the second flat horizontal portion.