Co-Ru Alloy Interconnect Structure for RC Delay and Strength
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Solution Overview
Problem
As device dimensions shrink, increased line resistance and parasitic capacitance lead to slower chip speeds and higher power consumption, and the use of air gaps in integrated circuits is hindered by structural weakness and mechanical instability.
Innovation Solution
A method for fabricating metal interconnect structures using a Co-Ru alloy liner between a titanium nitride barrier layer and a copper metal layer, with optional additional liners, to reduce interconnect capacitance and enhance mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If air gaps are used between interconnect lines to reduce dielectric constant, then RC signal delay and power consumption are reduced, but mechanical strength is reduced and structural deformation occurs
Solution Approach 1:
The patent changes the material parameter of the liner from conventional materials to Co-Ru alloy, which has specific properties that reduce divot formation. The alloy composition parameters (cobalt and ruthenium ratios) are optimized to achieve both mechanical strength and low divot formation, resolving the contradiction between energy loss reduction and strength maintenance.
Solution Approach 2:
The patent uses a composite structure with multiple liners (TiN barrier layer, Co-Ru alloy liner, and optionally additional liners) combined with air gaps. This composite approach allows the structure to maintain mechanical strength through the liner materials while achieving low dielectric constant through the air gaps, thus reducing power consumption without sacrificing strength.
2Productivity
If device dimensions are shrunk to increase packing density, then more conductive lines can be packed, but line resistance increases and RC delay increases
Solution Approach 1:
The patent changes the dielectric parameter by introducing air gaps with dielectric constant of approximately 1, replacing conventional dielectric materials with dielectric constant of 4 or higher. This parameter change reduces the RC time constant, allowing faster signal propagation even as device dimensions shrink and packing density increases.
Solution Approach 2:
The patent applies different dielectric properties to different regions: air gaps are strategically placed between interconnect lines where they are needed for RC reduction, while maintaining solid dielectric material in other regions. This local differentiation allows high packing density while minimizing RC delay in critical signal paths.
3Reliability
If Co-Ru alloy liner is used to prevent divot formation, then structural integrity is maintained, but manufacturing complexity increases
Solution Approach 1:
The Co-Ru alloy liner acts as an intermediary layer between the TiN barrier layer and the copper metal layer. This intermediary prevents direct interaction between copper and the barrier layer, preventing divot formation and maintaining structural integrity. The intermediary approach simplifies the overall manufacturing by preventing defects rather than requiring complex post-processing.
Data Source
AI summary
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.