Costas Loop Channel Estimation Circuit for OFDM Systems

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Solution Overview

Problem

Existing OFDM systems face performance decline in high-speed mobile applications due to inter-carrier interference (ICI) and changing power delay profiles, requiring complex and power-intensive channel estimation methods.

Innovation Solution

The adoption of a Costas channel estimation method that eliminates complex multiplication operations, using a de-mapping circuit, Costas channel estimation circuit, loop filter circuit, and smooth circuit to iteratively approach channel convergence without requiring extensive hardware, thereby reducing power consumption and hardware area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LMS algorithm is used for channel estimation, then channel tracking performance is improved, but hardware complexity and power consumption increase due to large amount of complex multiplication operations

Engineering Contradiction:
Improvechannel tracking performanceVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the complex multiplication operations from the LMS algorithm by using a Costas loop-based channel estimation method. The Costas loop uses only addition, subtraction, and sign operations, completely removing the computationally intensive complex multiplication component while maintaining channel tracking capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mathematical computation mechanism (complex multiplication) with a different operational mechanism (Costas loop with sign operations). This substitution uses a phase-locked loop structure that achieves channel estimation through comparison and sign detection rather than through complex arithmetic operations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If LMS algorithm is used for channel estimation, then channel tracking performance is improved, but power consumption increases due to large amount of complex multiplication operations

Engineering Contradiction:
Improvechannel tracking performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates the power-intensive complex multiplication operations from the LMS algorithm. By using Costas loop-based estimation with only addition, subtraction, and sign operations, the method removes the primary source of power consumption while maintaining effective channel tracking performance.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If complex multiplication operations are performed for channel estimation, then estimation accuracy is maintained, but hardware area increases

Engineering Contradiction:
Improveestimation accuracyVSAvoidhardware area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent removes the complex multiplication operations that require significant hardware area (multipliers, accumulators) and replaces them with simple sign operations and additions. This extraction of the computationally intensive component dramatically reduces the required hardware area while maintaining estimation accuracy through the Costas loop mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9401825B1Apparatus and method for channel estimation
Publication Date: 2016.07.26 IND TECH RES INST
  • US9401825B1 patent drawing
  • US9401825B1 patent drawing
  • US9401825B1 patent drawing

AI summary

A channel estimation apparatus includes a de-map circuit to map multiple preambles corresponding to multiple channels into real part (I) and imaginary part (Q) in QPSK coordinate. The costas channel estimation circuit receives the real part (I) and the imaginary part (Q) to operate corresponding to one of the BPSK structure and the QPSK structure to proceed calculation of (Q−I)*Sign (I+Q) or Q*Sign (I)−I*Sign (Q) for outputting an output value, wherein Sign(x) represents a sign circuit taking a sign of the x value. The loop filter circuit filters the output value under time domain. The smooth circuit receives the output of the loop filter circuit to perform smooth processing under frequency domain and then feeds back the same to the de-map circuit to continue channel estimation of a next loop, wherein the phases of the preambles are adjusted according to a direction of the output value approaching to zero.