Constant On-Time Converter Stabilization with Low ESR Capacitors

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Solution Overview

Problem

Constant on-time DC/DC converters face stability issues when using output capacitors with low equivalent series resistance (ESR), such as ceramic capacitors, which can lead to system instability due to dominant voltage ripple across the ESR.

Innovation Solution

A constant on-time converter design that includes a feedback circuit, an operating circuit with a compensation signal adjusted by a digital controller, a comparison circuit, a timer, and a driving circuit, which generates a compensation signal to stabilize the converter's operation by compensating for the delayed phase caused by the output capacitor's capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a traditional constant on-time converter is used with low ESR output capacitors, then the converter achieves high efficiency and small size, but the system becomes unstable due to dominant voltage ripple across the ESR

Engineering Contradiction:
Improvesystem stabilityVSAvoidconverter configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the voltage ripple across the ESR is detected and fed back to the control circuit. This feedback signal is used to adjust the switching duty cycle dynamically, compensating for the destabilizing effect of low ESR capacitors and restoring system stability without adding significant complexity to the overall converter configuration.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the control parameter from fixed duty cycle to dynamically adjusted duty cycle based on the ESR voltage ripple amplitude. By monitoring the ripple voltage and adjusting the switching parameters in real-time, the system maintains stability across varying load conditions while continuing to use low ESR capacitors for high efficiency and small size.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the ESR resistance value is increased to stabilize the system, then system stability is improved, but voltage ripple and power loss increase

Engineering Contradiction:
Improvesystem stabilityVSAvoidpower loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The feedback circuit monitors the voltage ripple across the ESR and provides this information to the control circuit. The control circuit uses this feedback to dynamically adjust the switching duty cycle, reducing the amplitude of voltage ripple and thereby minimizing power loss in the ESR while maintaining system stability without requiring high ESR capacitors.

Inventive Principle:
Principle #23Feedback

3Reliability

If a compensation signal is added to stabilize the converter with low ESR capacitors, then system stability is maintained, but device complexity increases

Engineering Contradiction:
Improvesystem stabilityVSAvoidconverter configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The compensation signal is generated through a feedback mechanism that detects the voltage ripple across the ESR and automatically adjusts the switching duty cycle. This closed-loop feedback approach provides the necessary compensation to stabilize the converter with low ESR capacitors while keeping the added complexity minimal through integrated circuit implementation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8749216B2Constant on-time converter with stabilizing operation and method thereof
Publication Date: 2014.06.10 CHENGDU MONOLITHIC POWER SYST
  • US8749216B2 patent drawing
  • US8749216B2 patent drawing
  • US8749216B2 patent drawing

AI summary

A constant on-time converter has an input terminal, an output terminal, a feedback circuit, an operating circuit, a comparison circuit, a timer, a driving circuit and a switching circuit. The operating circuit is coupled to a compensation signal adjusted by a digital controller, and the compensation signal rises up to a predetermined amplitude when a feedback signal is less than a reference signal.