Constant On-Time Converter Sleep Mode Audible Noise

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Solution Overview

Problem

Traditional constant on-time switching converters experience a reduction in switching frequency under light load conditions, leading to audible noise due to frequencies falling within the audible range of 20 Hz to 20 kHz, which affects efficiency and noise levels.

Innovation Solution

A constant on-time switching converter design that includes a switching circuit, on-time control circuit, comparing circuit, and logic circuit, which enters a sleep mode when the switching frequency approaches the audible range, reducing the on-time control signal to increase the switching frequency and prevent audible noise, thereby enhancing efficiency and reducing conduction loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the switching converter operates under light load condition, then the efficiency is improved, but the switching frequency reduces into audible range generating audible noise

Engineering Contradiction:
Improveconduction lossVSAvoidaudible noise
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent implements dynamic switching frequency adjustment by introducing a sleep mode that activates when the switching frequency approaches the audible range. The controller dynamically modifies the on-time control signal to increase switching frequency above 20kHz, thereby eliminating audible noise while maintaining light load operation benefits. This dynamic adaptation resolves the contradiction by allowing efficiency improvement without incurring audible noise penalties.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the switching frequency parameter from a fixed value to a variable that can be adjusted between normal mode and sleep mode. By modifying the on-time control signal parameter, the system transitions switching frequency from audible range to ultrasonic range (>20kHz) when needed, resolving the contradiction between efficiency and audible noise generation.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If the on-time control signal is reduced to increase switching frequency, then the audible noise is avoided, but the conduction loss increases

Engineering Contradiction:
Improveaudible noiseVSAvoidconduction loss
Core Design Contradiction:
Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The system dynamically adjusts the on-time control signal only when switching frequency approaches audible range, rather than continuously reducing it. This conditional dynamic adjustment minimizes conduction loss while still achieving audible noise elimination, resolving the contradiction between noise avoidance and energy efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent selectively changes the on-time control signal parameter only when necessary (when frequency approaches audible range), rather than continuously modifying it. This selective parameter change achieves audible noise avoidance while minimizing the impact on conduction loss and overall efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9041373B2Constant on-time switching converters with sleep mode and control methods thereof
Publication Date: 2015.05.26 CHENGDU MONOLITHIC POWER SYST
  • US9041373B2 patent drawing
  • US9041373B2 patent drawing
  • US9041373B2 patent drawing

AI summary

A constant on-time switching converter includes a switching circuit, an on-time control circuit, a comparing circuit and a logic circuit. The switching circuit has a first switch and is configured to provide an output voltage to a load. The on-time control circuit generates an on-time control signal to control the on-time of the first switch. The comparing circuit compares the output voltage of the switching circuit with a reference signal and generates a comparison signal. The logic circuit generates a control signal to control the first switch based on the on-time control signal and the comparison signal. When the switching frequency of the switching circuit approaches an audible range, the switching converter enters into a sleep mode, the on-time control signal is reduced to increase the switching frequency of the switching circuit.