Constant On-Time Voltage Converter Ripple Detection

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Solution Overview

Problem

Conventional constant on-time controllers in voltage converters face limitations due to small ESR of output capacitors, leading to poor noise immunity, inadequate DC voltage regulation, and compromised transient response, especially in detecting output voltage ripple and requiring complex compensation circuits.

Innovation Solution

A constant on-time pulse width control-based apparatus comprising a controller, comparator, and logic circuit that generates a pulse control signal with adjustable on-time pulse width to charge the output capacitor, utilizing a voltage ramp signal and inductor current signal to improve noise immunity and DC regulation, while allowing for flexible current mode compensation and maintaining fast transient response.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional constant on-time controller is used, then the control scheme is simple, but noise immunity is poor and DC voltage regulation is inadequate due to small ESR of output capacitor

Engineering Contradiction:
Improvecontrol scheme complexityVSAvoidnoise immunity and DC voltage regulation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces an intermediary circuit that includes a capacitor connected in parallel with the output capacitor and a resistor connected in series with the capacitor. This intermediary circuit generates a compensated voltage ripple signal that has enhanced amplitude, allowing the controller to effectively detect output voltage ripple even when the original output capacitor has small ESR. The intermediary acts as a mediator that transforms the weak voltage ripple signal into a detectable form without complicating the overall control scheme.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If conventional schemes are proposed to improve detection of output voltage ripple, then detection capability is improved, but noise immunity worsens and DC voltage regulation becomes worse

Engineering Contradiction:
Improveoutput voltage ripple detection capabilityVSAvoidnoise immunity and DC voltage regulation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the compensated voltage ripple signal from the intermediary circuit is fed back to the controller. The controller uses this enhanced feedback signal to adjust the switching duty cycle, thereby improving both the detection capability of output voltage ripple and the overall DC voltage regulation. The feedback loop ensures that the system maintains stability while achieving improved detection precision.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If voltage mode control loop is adopted, then control flexibility is improved, but compensation circuit design becomes complicated due to lack of current signal

Engineering Contradiction:
Improvecontrol flexibilityVSAvoidcompensation circuit design
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the voltage mode control loop with the current signal from the inductor by using the compensated voltage ripple signal that incorporates both voltage and current information. This merging approach allows the controller to function with voltage mode control flexibility while eliminating the need for separate complicated compensation circuits, as the intermediary circuit provides the necessary signal integration.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9831774B2Constant on-time pulse width control-based scheme used in voltage converter
Publication Date: 2017.11.28 MEDIATEK INC
  • US9831774B2 patent drawing
  • US9831774B2 patent drawing
  • US9831774B2 patent drawing

AI summary

A constant on-time pulse width control-based apparatus used in a voltage converter includes a comparator, a logic circuit, and a controller. The comparator is configured for generating a logic control signal to a logic circuit according to two resultant signals of the controller. The logic circuit is configured for generating a pulse control signal with an on-time pulse width to charge an output capacitor of an output stage circuit of the voltage converter according to the logic control signal. The controller is configured for generating the two resultant signals to the comparator by detecting an inductor current signal from an inductor of the output stage circuit, generating a voltage ramp signal, amplifying and generating an output voltage ripple signal based on a reference voltage.