Counter Abstraction Module for Formal Verification Acceleration
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Solution Overview
Problem
Formal verification of electronic designs with counters becomes increasingly complex due to their exponential growth in size and complexity, leading to inefficient performance, as arbitrary counter values can result in undesirable verification results.
Innovation Solution
A counter abstraction module intercepts next counter values and determines whether to accelerate the counter from its current value to an engine-synthesized next value based on critical values, using a multiplexer to select between original and engine-synthesized next counter values, thereby optimizing formal verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If counters are used in electronic designs to store event occurrences, then the design functionality is improved, but the sequential depth for formal engines increases and verification performance deteriorates
Solution Approach 1:
The patent extracts the counter from its original context and creates an abstracted version. The counter abstraction module separates the counter's counting function from its storage function, allowing the formal engine to work with an abstracted counter model that has reduced sequential depth while preserving the essential counting behavior needed for verification.
Solution Approach 2:
The patent changes the parameters of the counter by introducing an abstraction level. The counter is transformed from a concrete sequential element with full state representation to an abstracted element with simplified state representation, changing its sequential depth parameter and thereby improving verification performance while maintaining design functionality.
2Reliability
If the number of counter iterations is increased to cover all possible counts, then verification completeness is improved, but processing time increases exponentially
Solution Approach 1:
The patent creates an abstracted copy of the counter that replicates its essential counting behavior without fully enumerating all possible states. This abstracted counter model allows the formal engine to verify design correctness without iterating through every possible counter value, significantly reducing processing time while maintaining verification completeness for critical properties.
Solution Approach 2:
The patent applies partial action by not requiring full enumeration of all counter states. Instead, the counter abstraction module enables verification of essential counting properties and design correctness without completing exhaustive iteration through all possible count values, achieving sufficient verification with reduced computational effort.
3Productivity
If arbitrary counter values are assigned during verification, then verification speed is improved, but verification reliability deteriorates due to undesirable results
Solution Approach 1:
The counter abstraction module serves as an intermediary between the formal engine and the actual counter. It mediates the verification process by providing abstracted counter values that maintain the essential relationships and constraints of the original counter, allowing faster verification without sacrificing reliability. The abstraction module ensures that assigned values preserve critical counting properties.
Solution Approach 2:
The patent changes the parameter representation of counter values through abstraction. Instead of using concrete arbitrary values that may violate design constraints, the abstraction module transforms counter values into an abstracted representation that inherently satisfies essential counting properties and relationships, maintaining verification reliability while enabling faster exploration of the state space.
4Measurement precision
If structural analyses are performed on counters to preserve structural information, then verification accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extracts only the essential structural information from the counter that is necessary for verification accuracy. The counter abstraction module identifies and preserves critical counting properties and relationships while discarding redundant structural details, thereby maintaining verification accuracy without requiring complex structural analyses of the entire counter implementation.
Data Source
AI summary
Disclosed are techniques for enhancing formal verification with counter acceleration for electronic designs. These techniques identify at least a portion of an electronic design including a counter having a current counter value and intercept next counter values transmitted to the counter with a counter abstraction module. These techniques further determine whether to accelerate the counter from the current counter value to an engine synthesized next counter value, rather than to an original next counter value based at least in part on a set of critical values. The counter is accelerated from the current counter value to the engine synthesized next counter value when the counter abstraction module determines to accelerate the counter.