Counter Bank Overflow Buffer for Packet Switching
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Solution Overview
Problem
Current packet switching systems face challenges in maintaining accurate counters due to high storage and bandwidth requirements, leading to costly implementations with high power consumption and pin count, especially when dealing with large numbers of counters that need to be updated frequently.
Innovation Solution
The implementation of a bank of multiple counters with an overflow buffer to store overflow indications, a counter update mechanism that adds entries to the overflow buffer upon overflow, and a secondary storage mechanism to update secondary counter values, reducing the need for extensive on-chip storage and bandwidth by incrementing secondary counters based on overflow conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If counters are implemented in hardware with large bit-width to prevent wrapping, then counter accuracy is improved, but on-chip storage requirements increase
Solution Approach 1:
The counter is divided into two parts: a hardware counter with limited bit-width that tracks current values, and a software-maintained external counter that accumulates overflow values. This segmentation allows the hardware counter to use minimal storage while the external counter handles the full precision requirements.
Solution Approach 2:
An overflow indicator acts as an intermediary between the hardware counter and the external counter. When the hardware counter overflows, it triggers the overflow indicator, which then signals the software to increment the external counter. This intermediary mechanism enables accurate counting with reduced hardware storage.
2Area of stationary object
If counters are read periodically by CPU to update external counters, then storage requirements are reduced, but CPU burden increases
Solution Approach 1:
The hardware counter automatically manages its own overflow detection and triggers the overflow indicator without requiring CPU intervention. This self-service mechanism reduces CPU burden by eliminating the need for software to continuously monitor and manage counter overflow conditions.
Solution Approach 2:
The manual CPU-based counter reading and updating mechanism is replaced with an automated overflow indicator system. The overflow indicator automatically triggers when the hardware counter overflows, substituting the mechanical CPU intervention with an automated signaling mechanism.
3Reliability
If counters are implemented with large bit-width in hardware, then counter wrapping is prevented, but power consumption increases
Solution Approach 1:
The counting function is segmented between a small hardware counter that consumes minimal power and a larger external counter that handles overflow accumulation. This segmentation allows the system to maintain wrapping prevention reliability while significantly reducing hardware power consumption.
Solution Approach 2:
The hardware counter uses a small, inexpensive, low-power storage element that is periodically reset after overflow. Instead of using a large, power-consuming counter throughout, the system uses a small counter that is effectively replaced (reset) after each overflow event, with the persistent state maintained in the external counter.
4Adaptability or versatility
If the number of counters is increased to track more traffic routes, then monitoring capability is improved, but storage and bandwidth requirements increase
Solution Approach 1:
Each counter is segmented into hardware and external components. This allows the system to scale the number of counters for enhanced monitoring capability while each individual counter occupies minimal on-chip storage space.
Solution Approach 2:
The overflow indicator and external counter mechanism serves multiple counters simultaneously. A single overflow indicator circuit can service multiple hardware counters, and a single external counter can accumulate overflow from multiple sources, providing multi-functionality that reduces per-counter storage requirements.
Data Source
AI summary
Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, and mechanisms for maintaining counters, such as in, but not limited to a packet switching system, and updating a secondary counter storage based on values of the counters and entries in an overflow buffer. Multiple counter values are stored in a counter bank. An indication of a particular counter of the multiple counters to update is received. A current value of the particular counter is updated in the counter bank, and if an overflow condition results, then an indication of the particular counter is added to an overflow buffer. Periodically each of the multiple counters are visited and corresponding values are updated in a secondary storage, and each entry is retrieved from the overflow buffer and a corresponding value is updated in the secondary storage.