Counter-Based Selective DRAM Refresh for Row Hammer Prevention
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Solution Overview
Problem
Existing row hammer prevention schemes in DRAM devices consume unnecessary energy by continuously sending refresh management commands without considering the actual need for row hammer refresh, leading to performance degradation.
Innovation Solution
A counter-based selective row hammer refresh method that uses a memory controller and DRAM-based counters to determine the necessity of row hammer refresh, performing it only when required, utilizing deterministic algorithms like TWiCe, Graphene, CBT, and CAT-TWO to optimize energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller continuously sends refresh management commands to prevent row hammer, then row hammer prevention is improved, but energy consumption increases and system performance degrades
Solution Approach 1:
The patent implements feedback mechanisms where the DRAM device monitors its own row hammer risk status and activates counters internally. The memory controller receives feedback about the current risk level and adjusts refresh management commands accordingly, sending them only when the counter threshold is reached, thus avoiding continuous commands and reducing energy consumption while maintaining prevention effectiveness
Solution Approach 2:
The DRAM device performs self-monitoring of row hammer risk conditions through internal counters and autonomously determines when refresh management is needed. This self-service approach eliminates the need for the memory controller to continuously query or command refresh operations, reducing unnecessary energy consumption while ensuring timely prevention when actually required
2Reliability
If the memory controller continuously sends refresh management commands, then row hammer prevention is improved, but system performance degrades
Solution Approach 1:
The system uses feedback from DRAM counters to the memory controller to trigger refresh management commands only when necessary. This feedback-driven approach ensures that refresh operations are performed at optimal moments based on actual row hammer risk, preventing performance degradation from unnecessary continuous commands while maintaining robust row hammer prevention
Solution Approach 2:
Instead of continuous refresh management commands, the patent implements periodic actions triggered by counter thresholds. The memory controller sends refresh management commands at specific intervals determined by the counter reaching predetermined values, which optimizes the balance between prevention effectiveness and system performance by avoiding excessive interruptions
3Reliability
If row hammer refresh is performed every time a refresh management command is sent, then row hammer prevention is improved, but energy consumption increases due to unnecessary refreshes
Solution Approach 1:
The patent applies partial action by performing row hammer refresh only when the counter reaches a threshold indicating actual risk, rather than refreshing every time a refresh management command is sent. This selective approach eliminates energy waste from excessive refresh operations while maintaining sufficient prevention through targeted refresh at critical moments
Solution Approach 2:
The system dynamically changes the refresh execution parameter based on counter values. When the counter reaches a predetermined threshold, the refresh is executed; otherwise, it is skipped. This parameter-based control mechanism optimizes energy consumption by adapting refresh frequency to actual row hammer risk conditions rather than following a fixed continuous pattern
Data Source
AI summary
Proposed are counter-based selective row hammer refresh apparatus and method for row hammer prevention and, more particularly, proposed are an apparatus and a method for reducing energy consumption of dynamic random access memory (DRAM) by improving counter-based algorithms for solving a row hammer problem when applying a refresh management (RFM) command that is a new command applied to the latest DRAM standards, such as DDR5, LPDDR5, and the like.