Successive Approximation Multiplier-Divider Using Counters and DAC
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Solution Overview
Problem
Traditional multiplier-divider circuits are complex and large due to the requirement of analog-to-digital and digital multiplier/divider circuits, leading to increased size and cost.
Innovation Solution
A successive approximation multiplier-divider circuit comprising a digital-to-analog converter, first and second counters, an oscillation circuit, and a control-logic apparatus, which generates output signals based on input signal amplitude and period, simplifying the circuit design and reducing size and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional multiplier-divider circuits use analog-to-digital converters, digital multiplier/divider circuits and digital-to-analog converters, then signal processing accuracy is improved, but circuit complexity and size increase
Solution Approach 1:
The patent extracts and eliminates the complex analog-to-digital converter, digital multiplier/divider circuits, and digital-to-analog converter from the traditional signal processing path. Instead, it uses a simplified approach where the input analog signal directly controls the oscillation frequency, and counters directly measure the signal characteristics to produce the output analog signal through a digital-to-analog converter alone, removing unnecessary conversion and computation stages
Solution Approach 2:
The patent replaces the mechanical/computational system of traditional digital signal processing (analog-to-digital conversion, digital multiplication/division operations, and digital-to-analog conversion) with a more direct system using frequency modulation and counter-based measurement. The analog signal's frequency characteristics are directly measured and processed, substituting complex digital computation with simpler frequency-domain operations
2Adaptability or versatility
If traditional multiplier-divider circuits use multiple converters and digital circuits, then signal processing capability is improved, but circuit size increases
Solution Approach 1:
The oscillation circuit serves multiple functions: it generates the clock signal for the counters, its frequency is controlled by the input analog signal, and it provides the timing reference for the measurement process. The counters also serve dual purposes by both measuring the input signal characteristics and generating control signals for the output. This multi-functionality reduces the need for separate dedicated circuits for each function
Solution Approach 2:
The patent merges the functions of signal measurement and signal generation into a unified process. The same counters that measure the input signal's frequency characteristics are used to control the output signal generation. The oscillation circuit combines frequency synthesis and timing reference functions. This merging of functions eliminates the need for separate measurement and generation circuits, reducing overall circuit size
3Measurement precision
If traditional multiplier-divider circuits use complex converter and processor components, then processing accuracy is improved, but manufacturing cost increases
Solution Approach 1:
The patent replaces expensive, complex analog-to-digital converters and digital signal processors with simpler, cheaper components. The use of basic oscillation circuits, counters, and a single digital-to-analog converter provides sufficient processing accuracy at a fraction of the cost of traditional implementations. The system accepts that the oscillation and counting components are simple, low-cost elements rather than precision instruments
Data Source
AI summary
A multiplier-divider circuit for signal process according to the present invention comprises a digital-to-analog converter, a first counter, a second counter, an oscillation circuit, and a control-logic apparatus. The digital-to-analog converter generates an output signal of the multiplier-divider circuit in accordance with the value of an input signal and a first signal. The first counter generates the first signal in response to a clock signal and the duty cycle of the input signal. The second counter generates a second signal in response to the clock signal and the period of the input signal. The oscillation circuit generates the clock signal in accordance with a third signal. The control-logic apparatus generates the third signal in response to the second signal and a constant. The first signal is correlated to the duty cycle of the input signal. The second signal is correlated to the period of the input signal.