Counter-Doped-Gate Voltage Generation for Non-Volatile Memory

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Solution Overview

Problem

Non-volatile memory systems require intermediate voltages for operations, but existing intermediate-voltage generators are inefficient in terms of silicon area usage due to the need for multiple devices like diodes and transistors.

Innovation Solution

A non-volatile memory system incorporating a counter-doped-gate device, specifically a MOSFET transistor, that generates intermediate voltages from high voltages, minimizing the number of devices required and optimizing silicon area usage by adjusting the voltage through a series connection of counter-doped-gate devices and addressable switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple devices (diodes and transistors) are used in the intermediate-voltage generator, then the intermediate voltages can be generated, but the silicon area usage becomes inefficient

Engineering Contradiction:
Improveintermediate voltage generation capabilityVSAvoidsilicon area usage
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple counter-doped-gate devices in a series connection to form a single integrated intermediate-voltage generation structure. This merging approach replaces the traditional separate diode and transistor components, reducing the overall silicon area while maintaining the ability to generate multiple intermediate voltage levels through the series arrangement of identical devices.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If traditional intermediate-voltage generators with multiple devices are used, then voltage generation is achieved, but device complexity increases

Engineering Contradiction:
Improvevoltage generation functionVSAvoidnumber of devices
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The counter-doped-gate device serves multiple functions simultaneously: it acts as both a voltage-generating element and a switching element. By using identical counter-doped-gate devices in series, the circuit achieves both voltage generation and selective connection functionality, eliminating the need for separate diodes and transistors, thus reducing device complexity while maintaining reliable voltage generation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively generates intermediate voltages with reduced silicon area usage, enhancing efficiency and accuracy while providing flexible voltage adjustment, thus addressing the inefficiencies of previous systems.

Implementation Method 1

a counter-doped-gate device adapted to generate an intermediate voltage from the high voltage and deliver the intermediate voltage to an intermediate-voltage node

Methodology Applied
Scientific EffectVoltage division: Electrical Resistance

Implementation Method 2

The counter-doped-gate device includes one or MOSFET transistors coupled in series

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP2676275B1Controlling a non-volatile memory
Publication Date: 2020.01.15 SYNOPSYS INC
  • EP2676275B1 patent drawingFigure 1
  • EP2676275B1 patent drawingFigure 2A~2D
  • EP2676275B1 patent drawingFigure 3

AI summary

Controlling a non- volatile memory. The non- volatile memory includes a plurality of memory cells in an integrated circuit substrate. The non- volatile memory also includes a high-voltage node in power-transmissive communication with the plurality of memory cells. Further, the non- volatile memory includes an intermediate-voltage node in power- transmissive communication with the plurality of memory cells. Moreover, the non- volatile memory includes a counter-doped-gate device, coupled within the integrated circuit substrate, in power-transmissive communication between the high-voltage node and the intermediate-voltage node.