Coupled Gate Transfer Transistor for CMOS Image Sensor Lag Reduction
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Solution Overview
Problem
CMOS active pixel sensors suffer from low signal-to-noise ratio (SNR) and narrow signal dynamic range due to limited power supply voltage, making it difficult to raise the initial potential of the floating diffusion node and resulting in image lag.
Innovation Solution
The implementation of a CMOS active pixel sensor with a coupled gate structure for the transfer transistor, utilizing a voltage coupling effect to bootstrap the gate bias voltage beyond the power supply voltage, thereby enhancing the signal-to-noise ratio and dynamic range by increasing the initial potential of the floating diffusion node.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional single-gate transfer transistor structure is used, then the device complexity is low, but the signal-to-noise ratio and dynamic range are limited due to insufficient gate bias voltage
Solution Approach 1:
The transfer transistor gate is divided into two separate gates (first transfer gate and second transfer gate) that can be independently controlled. This segmentation allows each gate to contribute to the overall charge transfer function, enabling higher gate bias voltage and improved signal-to-noise ratio without requiring a complete redesign of the entire transistor structure
Solution Approach 2:
The first transfer gate and second transfer gate are positioned in a nested configuration where they overlap or are closely coupled. This nested arrangement allows both gates to work together synergistically, with the combined gate voltage exceeding what a single gate could achieve, thereby improving dynamic range while maintaining compact device geometry
2Measurement precision
If the power supply voltage is increased to raise the initial potential of the floating diffusion node, then the dynamic range improves, but the power consumption and manufacturing constraints are worsened
Solution Approach 1:
Instead of increasing the power supply voltage to achieve higher dynamic range, the invention changes the parameter of gate bias voltage by introducing a second transfer gate. This allows the gate voltage to exceed the power supply voltage through capacitive coupling, thereby expanding dynamic range without increasing power consumption or requiring higher voltage power supplies
3Measurement precision
If the initial potential of the floating diffusion node is raised to improve signal transfer, then the signal dynamic range increases, but image lag occurs due to incomplete charge transfer
Solution Approach 1:
The first transfer gate is activated before the second transfer gate to preliminarily initiate charge transfer from the photodiode. This preliminary action ensures that charges begin moving toward the floating diffusion node early, preventing charge accumulation that would cause image lag, while the subsequent activation of the second gate completes the transfer with enhanced voltage
4Measurement precision
If a four-transistor structure is used instead of one or three transistors, then the signal transfer capability improves, but the device complexity and manufacturing cost increase
Solution Approach 1:
The invention merges the functions of multiple transistors into a single transfer transistor by implementing a dual-gate structure. This combining approach maintains the signal transfer capability of multi-transistor designs while reducing overall device complexity by eliminating the need for separate transistor components, thereby simplifying manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the signal-to-noise ratio and dynamic range of the CMOS active pixel sensor, allowing for more effective transfer of charges from the photodiode and reducing image lag by raising the gate bias voltage and initial potential of the floating diffusion node.
Implementation Method 1
utilizing a voltage coupling effect to bootstrap the gate bias voltage beyond the power supply voltage
Implementation Method 2
The photodiode generates electric charges in response to an incident light
Data Source
AI summary
A complementary metal-oxide semiconductor (CMOS) active pixel sensor includes a photodiode, a transfer transistor with a coupled gate, a reset transistor and a signal transfer circuit, where the photodiode generates electric charges in response to incident light, the transfer transistor transfers the electric charges integrated in the photodiode to a floating diffusion node, wherein the transfer transistor has a first transfer gate and a second transfer gate, and the first and second transfer gates have a coupled gate structure, the reset transistor resets a potential level of the floating diffusion node by a given voltage level, the signal transfer circuit transfers the potential level of the floating diffusion node to an internal circuit in response to a selection signal, and the CMOS active pixel sensor with the coupled gate may increase a capacity of the photodiode and reduce an image lag by using a voltage coupling effect of the coupled gate.