Sequentially Coupled Charge Storage Pixels for Continuous Readout
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Solution Overview
Problem
Integrated devices for massively-parallel sample analysis are limited by their large size, portability issues, need for skilled operation, high power consumption, and cost, making them unsuitable for point-of-care applications, and they face challenges in efficiently collecting and reading out charge carriers due to limitations in charge transfer rates and readout processes.
Innovation Solution
The integration of multiple charge storage regions within an integrated circuit, allowing for simultaneous or sequential transfer and readout of charge carriers, with control signals managing the transfer gates to optimize charge collection and readout processes, enhancing the frequency and efficiency of charge carrier collection and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple charge storage regions are integrated within an integrated circuit, then charge collection efficiency and readout frequency are improved, but device complexity increases
Solution Approach 1:
The photodetector is divided into multiple charge storage regions (first charge storage region and second charge storage region) that can independently store charge carriers. This segmentation allows parallel charge collection operations, where one region can be read out while another continues collecting charges, thereby improving charge collection efficiency and readout frequency without requiring external complex processing systems.
Solution Approach 2:
Multiple charge storage regions are integrated within a single integrated circuit device, combining multiple storage functions into one unified structure. The first and second charge storage regions are electrically coupled to the photodetection region and can be controlled by shared control signals, merging multiple storage operations into a compact integrated solution that improves efficiency while managing complexity through unified control.
2Measurement precision
If charge carriers are transferred sequentially between multiple storage regions, then readout noise is reduced, but transfer time increases
Solution Approach 1:
The charge transfer operation uses periodic switching between two storage regions. During each measurement cycle, charge carriers are collected in one region while the other region is read out, then the roles are reversed in the next cycle. This periodic action allows overlapping of charge collection and readout operations, reducing the effective transfer time while maintaining the noise reduction benefits of sequential readout through controlled transfer gates.
Solution Approach 2:
The dual charge storage region design enables continuous charge collection while one region is being read out. The transfer gates control seamless switching between regions, ensuring that charge collection never stops while readout operations proceed. This continuity eliminates idle time between collection and readout, reducing overall transfer time while maintaining measurement precision through controlled sequential access.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables more frequent and efficient collection and readout of charge carriers, improving the performance of integrated devices for point-of-care applications by reducing size, increasing portability, and lowering power requirements while maintaining analysis efficiency.
Implementation Method 1
a photodetection region configured to generate charge carriers in response to receiving incident photons
Data Source
AI summary
Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates. Some aspects of the present disclosure relate to techniques for manufacturing and operating integrated circuits according to the other techniques described herein.