Coupled Ring Oscillator TDC for Process-Variation Resolution
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Solution Overview
Problem
Time-to-digital converters (TDCs) face performance degradation due to variations in delay elements caused by process variations, affecting their digital resolution and accuracy in applications like digital phase lock loops and laser range finding.
Innovation Solution
A time-to-digital converter design incorporating a coupled ring oscillator structure with a delay stage matrix and measurement circuit, where each delay stage is coupled to generate delayed signals, allowing for increased resolution by distributing phase shifts uniformly across multiple rings, and a dynamic element matching technique to reduce nonlinearity from device mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a delay line with multiple delay elements is used to generate equally spaced phases, then the TDC can quantify time information, but process variations in delay elements degrade the digital resolution and measurement precision
Solution Approach 1:
The delay line is segmented into multiple delay stages, each contributing to the overall phase distribution. By dividing the delay line into N stages, the system achieves finer time resolution while the segmented structure allows for better management of process variations across different stages.
Solution Approach 2:
Different delay stages are designed with optimized local characteristics to compensate for process variations. Each delay stage can be tuned or designed with specific properties to ensure uniform phase distribution despite manufacturing variations, improving overall measurement precision.
2Measurement precision
If the propagation delay of each delay element is increased to improve time resolution, then the digital representation becomes more precise, but the variations due to process variations worsen and degrade TDC performance
Solution Approach 1:
The patent transitions from a one-dimensional delay line to a two-dimensional array of delay stages arranged in rows and columns. This dimensional change allows for multiple propagation paths and redundant measurements, enabling the system to achieve high time resolution while compensating for manufacturing variations through statistical averaging and error cancellation across the array.
Solution Approach 2:
Multiple delay paths are merged together to form the final time measurement. By combining signals from multiple delay stages and paths, the system achieves improved time resolution while the merging process inherently averages out process variations, reducing their impact on overall performance.
3Measurement precision
If more delay stages are added to the delay line to increase digital resolution, then the TDC can represent time with finer granularity, but the device complexity increases
Solution Approach 1:
The delay structure is organized as a two-dimensional array rather than a simple linear sequence. This allows N delay stages to provide N(N+1)/2 unique delay values, achieving higher resolution without proportionally increasing the number of physical delay elements. The dimensional arrangement creates multiple overlapping delay paths that can be efficiently controlled with fewer elements.
Solution Approach 2:
Each delay stage in the array serves multiple functions simultaneously - it contributes to multiple different delay paths and can be used in combination with other stages to create various time delays. This multi-functionality allows the system to achieve high digital resolution without requiring a separate dedicated element for each delay value, reducing overall device complexity.
Data Source
AI summary
Embodiments of a time-to-digital converter are provided, comprising a delay stage matrix and a measurement circuit. The delay stage matrix comprises a first and a second delay lines coupled thereto, and is arranged to propagate a transition signal from a starting delay stage in the first and a second delay lines, wherein each of the first and second delay lines comprises a same number of delay stages coupled in series, each delay stage in one of the first and second delay lines is coupled to a corresponding delay stage in the other delay line and operative to generate a delayed signal. The measurement circuit is arranged to determine a time of the transition signal propagating along the delay stages by sampling the delayed signals using a measurement signal to generate and hold a digital representation of the time.