Coupled Semiconductor Package Partial Insulation
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Solution Overview
Problem
Conventional semiconductor packages require separate insulating materials to achieve partial insulation when combined with a heat sink, which is costly and complicates the manufacturing process.
Innovation Solution
A coupled semiconductor package design where the lower surfaces of substrate pads are formed to be either electrically connected or insulated, allowing for partial insulation without the application of insulating materials to the heat sink, utilizing conductive or insulating substrate pads and terminals connected via welding or adhesives, and a package housing that includes penetration holes for heat sink integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate insulating materials are applied to the heat sink to achieve insulation, then electrical insulation is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the substrate pad structure with the insulating function by forming insulating layers directly on the substrate pad lower surfaces. This integration eliminates the need for separate insulating materials on the heat sink, reducing both structural complexity and manufacturing steps while maintaining electrical insulation reliability
Solution Approach 2:
The patent introduces insulating layers as intermediary structures between the substrate pads and the heat sink. These insulating layers serve as mediators that provide electrical insulation while allowing thermal contact, resolving the contradiction between insulation requirements and structural simplicity
2Reliability
If separate insulating materials are applied to the heat sink to achieve insulation, then electrical insulation is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines the insulating function with the substrate pad structure by forming insulating layers during the substrate pad fabrication process. This merging eliminates the need for additional insulating materials and assembly steps, reducing manufacturing cost while ensuring electrical insulation reliability
Solution Approach 2:
The substrate pad structure provides its own insulating function through the formed insulating layers, eliminating the need for external insulating materials. The structure serves itself by integrating the insulation function into the substrate pad, thereby reducing manufacturing cost
3Reliability
If lower surfaces of substrate pads are exposed for electrical connection, then electrical connectivity is improved, but heat radiation efficiency decreases
Solution Approach 1:
The patent applies local quality by forming insulating layers selectively on specific regions of the substrate pad lower surfaces. This allows certain areas to remain exposed for electrical connectivity while other areas have insulating layers for heat radiation management, resolving the contradiction between connectivity and heat radiation efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient heat radiation and simplifies the manufacturing process by eliminating the need for separate insulating materials, maximizing heat dissipation while ensuring electrical stability and connectivity.
Implementation Method 1
another one or more substrate pads may be formed of at least one metal layer, at least one insulating layer, and at least one metal layer, which are sequentially stacked
Implementation Method 2
the substrate pads may be formed of a conductive metal
Implementation Method 3
a package housing covering a part of the at least one semiconductor chip and the at least one terminal
Data Source
AI summary
Provided is a coupled semiconductor package including at least two substrate pads; at least one semiconductor chip installed on each of the substrate pads; at least one terminal each of which is electrically connected to each substrate pad and each semiconductor chip; and a package housing covering a part of the at least one semiconductor chip and the at least one terminal, wherein lower surfaces of one or more substrate pads are formed to be electrically connected and lower surfaces of another one or more substrate pads are formed to be electrically insulated. Accordingly, partial insulation may be economically realized without applying an insulating material to a heat sink, when the package is joined to the heat sink.


