Configuration-Based Coverage Data Merge for IC Verification
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Solution Overview
Problem
Existing methods for merging coverage data in integrated circuit design verification lack flexibility, particularly in handling topological changes and different verification scenarios, limiting their ability to configure merge operations and create coverage models effectively.
Innovation Solution
A configuration-based merge operation method that allows for flexible mapping of source to target instances/types, enabling union merges on portions of the design, and the creation of coverage models according to user requirements, which can merge coverage data across various verification runs and technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing methods for merging coverage data are used, then verification can be performed, but flexibility in handling topological changes and different verification scenarios is limited
Solution Approach 1:
The patent implements dynamic configuration options that allow the verification system to adapt its merging behavior based on the specific verification scenario. The system can dynamically select between different merge strategies (e.g., union merge, overwrite merge, selective merge) and handle topological changes by reconfiguring the merge operation parameters, thereby improving flexibility without permanently increasing system complexity.
Solution Approach 2:
The patent changes parameters of the coverage data merging process by introducing configurable merge options and parameters. These parameters control how coverage data is merged, allowing the system to adjust its behavior for different verification scenarios, handle topological changes, and select which coverage metrics to merge or exclude, thus improving adaptability while maintaining manageable complexity.
2Measurement precision
If configuration-based merging is implemented to handle complex verification scenarios, then verification accuracy improves, but the time required for system-level verification increases
Solution Approach 1:
The patent performs preliminary actions by pre-configuring merge parameters and selecting appropriate merge strategies before the actual coverage data merging process. This preliminary configuration phase allows the system to prepare the merging operation in advance, reducing the time required during actual verification while maintaining accurate results through careful pre-planning of the merge approach.
Solution Approach 2:
The patent applies partial merging by selectively merging only the necessary coverage metrics and excluding redundant or less important ones. This partial action approach reduces the overall verification time by focusing on critical coverage areas while still maintaining sufficient verification accuracy for system-level validation.
3Reliability
If multiple simulation runs are executed with different coverage models, then comprehensive coverage data is generated, but the complexity of merging and managing these results increases
Solution Approach 1:
The patent segments the coverage data management process by organizing coverage models and their associated data into distinct, manageable units. Each simulation run's coverage data is treated as a separate segment that can be independently configured and merged. This segmentation reduces the complexity of managing multiple coverage results by breaking down the overall management task into smaller, more controllable segments.
Solution Approach 2:
The patent implements a universal merge configuration system that can handle multiple types of coverage data from different simulation runs through a single unified interface. This multi-functional approach allows the same merging infrastructure to process various coverage models and metrics, reducing the complexity that would otherwise arise from needing separate management mechanisms for each type of coverage data.
Data Source
AI summary
In one embodiment of the invention, a method for verification of an integrated circuit design is disclosed. The method includes independently executing simulation runs in response to a plurality of coverage models to respectively generate a plurality of coverage data for a plurality of functional blocks within one or more integrated circuit designs; generating a target coverage model to selectively merge at least first coverage data associated with a first coverage model and second coverage data associated with a second coverage model; and in response to the target coverage model and the plurality of simulation runs, selectively projecting the plurality of coverage data into a merged coverage data result associated with the target coverage model. The method may further store the merged coverage data results into a storage device. The plurality of simulation runs may include at least one functional simulation run and at least one formal verification run.