COWOS Package Substrate Warpage Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges in miniaturization and packaging techniques for semiconductor devices, particularly in reducing physical size and increasing integration density, where existing methods are limited in reducing package warpage and manufacturing costs.
Innovation Solution
A chip on wafer on substrate (COWOS) package is developed, where a substrate is attached to the backside of dies during manufacturing, providing protection and structural support, and through vias are formed in the substrate for electrical connections, with redistribution layers and connectors used to bond logic and memory dies, and a second substrate is attached to the top surfaces of the dies to reduce warpage and eliminate the need for a separate carrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a substrate is attached to the backside of dies during manufacturing, then the reliability of the package is improved by reducing warpage, but the device complexity increases due to additional substrates and bonding steps
Solution Approach 1:
The first substrate is attached to the backside of the dies during the manufacturing process itself, before the dies are fully assembled into the final package. This preliminary action provides structural support and reduces warpage early in the process, preventing reliability issues before they manifest in the finished product.
Solution Approach 2:
The first substrate acts as an intermediary element between the dies and the manufacturing process. It provides a stable platform for handling and assembling the dies, and its mechanical properties help counteract warpage forces that would otherwise affect package reliability.
2Ease of manufacture
If a second substrate is attached to the top surfaces of the dies, then the need for a separate carrier is eliminated reducing manufacturing costs, but the device complexity increases due to additional bonding steps
Solution Approach 1:
The second substrate is attached to the top surfaces of the dies, merging the function of a separate carrier into the package structure itself. This eliminates the need for additional carrier materials and reduces the number of separate components, thereby lowering manufacturing costs despite the added bonding step.
Solution Approach 2:
The second substrate serves multiple functions: it provides structural support during manufacturing, eliminates the need for a separate carrier, and becomes an integral part of the final package structure. This multi-functionality justifies the additional bonding step by consolidating multiple roles into a single component.
3Quantity of substance
If through vias are formed in the substrate for electrical connections, then the integration density is improved, but the manufacturing precision requirements increase
Solution Approach 1:
Through vias are formed vertically through the substrate, utilizing the vertical dimension to create electrical connections between different layers of the stacked package. This approach increases integration density by enabling three-dimensional interconnectivity without expanding the planar footprint of the device.
Data Source
AI summary
Chip on wafer on substrate structures and methods of forming are provided. The method includes attaching a first die and a second die to an interposer. The method also includes attaching a first substrate to a first surface of the first die and a first surface of the second die. The first substrate includes silicon. The first surface of the first side is opposite to the surface of the first die that is attached to the interposer, and the first surface of the second die is opposite to the surface of the second die that is attached to the interposer. The method includes bonding the interposer to a second substrate.