CPFSK Modulator Zero-Crossing Switching for Arbitrary Symbol Rates

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional Direct Antenna Modulation (DAM) schemes for Frequency Shift Keying (FSK) modulation are restricted by the need to switch reactive components at zero crossings, limiting their use with arbitrary frequency, data rate, and modulation index, which is incompatible with conventional communication system specifications.

Innovation Solution

A Continuous Phase Frequency Shift Keying (CPFSK) modulator that adjusts the frequency shift to occur at zero crossings of the RF waveform by adding an offset, allowing for efficient operation at arbitrary frequency, data rate, and modulation index, using a time-varying matching network and digital signal processing to synchronize the frequency changes with the RF signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional DAM schemes switch reactive components at zero crossings, then efficient radiation is achieved, but the system is restricted to specific relationships between carrier frequency, data rate and modulation index

Engineering Contradiction:
Improveenergy dissipationVSAvoidcompatibility with arbitrary frequency, data rate and modulation index
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic adjustment of the matching network reactance through digital signal processing. The reactance is continuously varied to maintain resonance at the instantaneous frequency of the FSK signal, allowing the system to adapt to arbitrary frequency, data rate and modulation index while switching at zero crossings. This dynamic matching eliminates the fixed relationship constraints of conventional DAM schemes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the reactance parameter of the matching network in real-time to match the instantaneous frequency of the modulated signal. By adjusting the reactance parameter dynamically rather than using fixed values, the system maintains efficient energy transfer and zero-crossing switching conditions regardless of the specific frequency, data rate or modulation index being used.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If frequency changes occur at periodic intervals in conventional CPFSK, then data modulation is achieved, but the phase of the signal may not align with zero crossings causing energy dissipation

Engineering Contradiction:
Improvedata rateVSAvoidenergy dissipation during frequency transitions
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent uses digital signal processing to monitor the instantaneous frequency and phase of the modulated signal, and provides feedback control to the matching network. This feedback mechanism ensures that frequency transitions are synchronized with zero crossings by detecting the actual signal phase and adjusting the matching network reactance accordingly, preventing energy dissipation during transitions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary calculation and adjustment of the matching network reactance before frequency transitions occur. The DSP system anticipates upcoming frequency changes based on the modulated data stream and pre-adjusts the matching network parameters so that transitions occur precisely at zero crossings, avoiding energy dissipation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11240078B1Frequency shift keying modulator, transmitter and link
Publication Date: 2022.02.01 HRL LAB
  • US11240078B1 patent drawing
  • US11240078B1 patent drawing
  • US11240078B1 patent drawing

AI summary

A Continuous Phase Frequency Shift Keying modulator provided to receive a series of binary symbols having a predetermined repetition period, and generate a series of sinusoidal signals comprising in sequence: a first sinusoidal signal with a first frequency in response to each received binary symbol having a first binary value; and a second sinusoidal signal with a second frequency in response to a received binary symbol having a second binary value, where the lowest of the first and second frequencies is larger than or equal to a third of the symbol rate; wherein the sinusoidal signals are shortened or lengthened with respect to the binary symbol they respond to, such that each first sinusoidal signal comprises an integer number of half periods of said first frequency and each second sinusoidal signal comprises an integer number of half periods of said second frequency.