CPLD Firmware Upgrade via Idle State Flash Replication
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Solution Overview
Problem
Existing methods for upgrading complex programmable logic devices (CPLDs) require system downtime as the upgrade process invalidates existing logics, leading to increased system downtime and reduced availability.
Innovation Solution
A method for dynamically upgrading CPLDs by upgrading flash memory without resetting the chip, then replicating data to random access memory when the system is idle, allowing for incremental and fault-tolerant upgrades without mandatory system shutdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the upgrade operation is performed on the CPLD using the existing ISP method, then the upgrade can be completed, but the service system is forced to power down and system downtime increases
Solution Approach 1:
The patent segments the upgrade process into two distinct phases: first updating the flash memory with new firmware, then replicating to RAM only when the service system is idle. This segmentation allows the service system to continue operating during the flash memory update phase, eliminating the need for mandatory shutdown and reducing system downtime while maintaining upgrade reliability.
Solution Approach 2:
The patent performs preliminary action by updating the flash memory before the service system needs to access the new firmware. The flash memory is prepared in advance and validated, so when the service system eventually needs to use the upgraded firmware, it can do so without interruption. This preliminary update approach eliminates the need for system shutdown during the critical update phase.
2Reliability
If the upgrade operation is interrupted, then the upgrade process fails, but the existing solution provides no mechanism for recovery
Solution Approach 1:
The patent implements feedback mechanisms through validation checks that verify whether the service system is in an idle state before replicating firmware from flash memory to RAM. This feedback control ensures that updates are only applied at safe moments, preventing interruptions during critical operations. The system continuously monitors service system state and adjusts the update timing accordingly, providing automatic recovery capability without increasing operational complexity.
3Reliability
If the service system is forced to power down for upgrade, then the upgrade can be completed safely, but system availability is lowered
Solution Approach 1:
The patent applies dynamics by making the firmware replication timing adaptive rather than static. Instead of forcing a system shutdown, the system dynamically monitors the service system state and automatically selects the optimal moment to replicate firmware when the system is idle. This dynamic approach maintains upgrade safety through validation checks while preserving system availability by allowing continuous operation during the update phase.
Data Source
AI summary
The present invention relates to the field of communications, and in particular, to a method and a system for dynamically upgrading a chip and a baseboard management controller. The method includes: obtaining an upgrade file that is used for upgrading a chip; upgrading, based on the upgrade file, data in a flash memory that is used for storing data of the chip, and not performing a reset operation on the chip at this time; and when it is acquired through detection that the state of a service system that is connected to the chip is a service idle state, replicating the upgraded data in the flash memory to a random access memory in the chip, and performing a reset operation on the chip. According to the present invention, the availability and maintainability of the system are improved.