CPLD-PSU Power Adjustment for Server Stability

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Solution Overview

Problem

Current methods for regulating server power consumption, such as CPU throttling and CPU frequency reduction based on PSU power information, either restrict server functions or cause CPU and PSU frequency oscillations, leading to potential system crashes.

Innovation Solution

A system comprising a Power Supply Unit (PSU) and a Complex Programmable Logic Device (CPLD) that adjusts server power consumption by receiving real-time electrical signals from the server, determining the current power supply condition, and adjusting the server power accordingly to maintain optimal operation without frequency oscillations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CPU throttling is triggered by PSU Alert signal, then PSU shutdown is prevented, but server functions are restricted and power consumption is significantly reduced

Engineering Contradiction:
ImprovePSU shutdown preventionVSAvoidserver function availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts CPU frequency based on real-time PSU output power conditions rather than using fixed throttling thresholds. The CPLD continuously monitors the PSU output power and adjusts the CPU frequency accordingly, allowing the system to adapt between power-saving mode and full-performance mode based on actual power availability, thus preventing both PSU shutdown and excessive function restriction.

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If BMC polls PSU power information at intervals, then CPU frequency can be adjusted, but CPU frequency oscillation and PSU power oscillation occur

Engineering Contradiction:
ImproveCPU frequency adjustmentVSAvoidfrequency stability
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The system implements a feedback mechanism where the CPLD continuously monitors the PSU output power and adjusts the CPU frequency in real-time based on the actual power conditions. This closed-loop feedback eliminates the oscillations caused by interval polling by ensuring the CPU frequency is always synchronized with the current PSU output power state, providing both stable frequency control and responsive power adjustment.

Inventive Principle:
Principle #23Feedback

3Use of energy by stationary object

If BMC polls PSU power information at intervals, then power consumption can be regulated, but system crash may occur due to PSU over-powering

Engineering Contradiction:
Improvepower consumption regulationVSAvoidsystem operational stability
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The CPLD directly monitors the PSU output power and automatically adjusts the CPU frequency without requiring BMC polling. This self-service mechanism ensures that the CPU frequency is always appropriately matched with the PSU output power, preventing over-powering conditions that could cause system crashes while maintaining effective power consumption regulation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12277016B2System, method, apparatus and device for adjusting power consumption, and medium
Publication Date: 2025.04.15 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US12277016B2 patent drawing
  • US12277016B2 patent drawing
  • US12277016B2 patent drawing

AI summary

A system, method, apparatus and device for adjusting power consumption, and a medium are provided. The system includes a Power Supply Unit (PSU) and a Complex Programmable Logic Device (CPLD). An input end of the PSU is connected to a server, and the PSU is configured to receive an initial electrical signal of the server in real time, and determine a current power supply condition according to the initial electrical signal to obtain a final electrical signal. The CPLD is connected to an output end of the PSU, and the CPLD is configured to receive the final electrical signal, increase a power of the server when the final electrical signal is a signal representing that the current power supply condition is high output power, and decrease the power of the server when the final electrical signal is a signal representing that the current power supply condition is low output power.