Server Startup Debugging via CPLD Signal Sampling

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Solution Overview

Problem

Debugging server startup sequences is cumbersome and inaccurate, as traditional methods involve welding test lines on circuit boards or relying on visual observation of LED displays, which are time-consuming and prone to damage or error.

Innovation Solution

A system utilizing a complex programmable logic device (CPLD) to sample and detect power-on signals without external instruments, integrating a sampling, detecting, and converting module to determine signal compliance with standards, and displaying non-compliant signals for corrective action.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If welding test lines on circuit board is used to measure startup sequence, then measurement capability is improved, but device complexity and time consumption increase

Engineering Contradiction:
Improvestartup sequence measurementVSAvoidcircuit board modification
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary debugging system that includes a debugging controller and display device. This intermediary system receives signals from existing circuit board components (CPU, memory, I/O devices) and processes them into readable startup sequence information, avoiding direct welding while maintaining measurement capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a logical copy of the startup sequence information by having the debugging controller read and process signals from existing hardware components. Instead of measuring physical waveforms directly, the system creates a digital representation of the startup sequence that can be displayed and analyzed

Inventive Principle:
Principle #26Copying

2Device complexity

If visual observation of LED display is used to debug startup sequence, then device complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improvedebugging systemVSAvoidsequence and time judgment
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the debugging controller continuously monitors startup sequence signals and provides real-time feedback through the display device. The system reads status information from hardware components and feeds back processed information about power rail sequencing, timing, and compliance with expected sequences

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces the mechanical/visual observation method with an electronic/digital system. Instead of human eyes observing LED patterns, a debugging controller electronically reads and processes signals, then displays structured information about the startup sequence, replacing manual visual judgment with automated electronic measurement

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If traditional welding method is used to measure startup sequence, then measurement capability is improved, but reliability deteriorates due to potential circuit board damage

Engineering Contradiction:
Improvesignal measurementVSAvoidcircuit board integrity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The debugging system acts as a non-invasive intermediary that interfaces with existing circuit board components through standard connection points. The debugging controller reads signals from CPU, memory, and I/O devices without requiring physical modification to the circuit board, thereby maintaining both measurement capability and circuit board reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system utilizes the self-service capability of existing circuit board components by having them naturally provide their status signals during normal startup operation. The debugging controller simply reads these naturally occurring signals without requiring the components to be modified or additional test equipment to be welded onto the board

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11797375B2System for debugging server startup sequence in debugging method applied in server
Publication Date: 2023.10.24 FULIAN PRESION ELECTRONICS (TIANJIN) CO LTD
  • US11797375B2 patent drawing
  • US11797375B2 patent drawing
  • US11797375B2 patent drawing

AI summary

A system for debugging server startups incorporated in a method applied in a server includes voltage regulators, a complex programmable logic device (CPLD), a transmitting device, and a display device. The voltage regulators transmit power-on signals required when the server is started. The CPLD receives the power-on signals, collects a second signal from the power on signals, and converts the second signals into a second data. The transmitting device receives the second data and parses the second data into a third data. The displaying device receives the third data and displays power-on signals that do not meet required standard during startup of server, according to the third data.