Co-Packaged Optics And Copper MCM Layout For Compact High-Speed Links
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Solution Overview
Problem
Increasing bandwidth requirements and power consumption in electronic modules lead to larger substrate sizes, causing production challenges such as increased substrate manufacturing yields, warpage, and PCB assembly issues.
Innovation Solution
A multi-chip module (MCM) substrate with centrally positioned main die and peripherally located MCM sockets, supporting mezzanine packages that extend beyond the substrate periphery, allowing independent power supply for some packages, and using electrical traces for data communication, thereby maintaining a compact size and reducing production challenges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of electrical connections is increased to accommodate more high-speed channels, then bandwidth capacity is improved, but substrate size increases causing manufacturing yield degradation
Solution Approach 1:
The patent transitions from a two-dimensional planar substrate layout to a three-dimensional stacked architecture using interposers. Multiple mezzanine packages are vertically stacked and interconnected through through-substrate vias and bump bonds, enabling high-density channel connectivity without increasing the substrate's planar footprint, thus maintaining manufacturing yield while achieving high bandwidth capacity
Solution Approach 2:
The patent implements a nested hierarchical structure where mezzanine packages containing multiple dies are stacked and interconnected through an interposer substrate. The interposer acts as a intermediary layer that nests multiple connection layers vertically, allowing numerous high-speed channels to be routed through compact stacked layers rather than spreading out on a large substrate
2Productivity
If the number of electrical connections is increased to accommodate more high-speed channels, then bandwidth capacity is improved, but substrate size increases causing warpage
Solution Approach 1:
By stacking mezzanine packages vertically through an interposer substrate and using through-substrate vias, the patent achieves high channel density in the vertical dimension rather than expanding horizontally. This compact stacked architecture reduces substrate area and minimizes thermal stress distribution, thereby reducing warpage while maintaining high bandwidth capacity
3Productivity
If the number of electrical connections is increased to accommodate more high-speed channels, then bandwidth capacity is improved, but substrate size increases causing assembly issues
Solution Approach 1:
The patent segments the electronic system into modular mezzanine packages that can be independently manufactured and tested, then stacked and interconnected through the interposer. This segmentation allows each module to be assembled separately with fewer connections per module, simplifying PCB assembly processes while achieving high overall bandwidth capacity through vertical integration
Solution Approach 2:
The nested stacked architecture consolidates multiple connection layers and components into a compact vertical structure. Through-substrate vias and bump bonds create dense interconnections within the stacked layers, reducing the number of external PCB traces and connection points required, thereby simplifying PCB assembly while maintaining high channel density
Data Source
AI summary
An example electronic module includes a multi-chip module (MCM) substrate comprising a central portion configured to receive a main die; a plurality of MCM sockets positioned about a peripheral portion of the MCM substrate; and a plurality of mezzanine packages coupled to respective MCM sockets of the plurality of MCM sockets. The plurality of MCM sockets and the MCM substrate are configured to enable communication of digital data between the main die and respective mezzanine packages of the plurality of mezzanine packages. The plurality of mezzanine packages includes at least one co-packaged copper (CPC) package; and at least one co-packaged optics (CPO) package.