CPODE Isolation Structure With Stacked Dielectrics for Low Leakage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in reducing contacted poly pitch (CPP) while maintaining electrical isolation and device reliability, as continuous poly on diffusion edge (CPODE) processes induce undesirable leakage current and compromise performance.
Innovation Solution
Implementing a CPODE structure with multiple dielectric layers of varying material composition stacked vertically to reduce leakage current, using a fixed-charge-free material for the bottom portion and an SiN-like material for the top portion, and forming the structure deeper than neighboring shallow trench isolation regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a continuous poly on diffusion edge (CPODE) process is used to scale the contacted poly pitch (CPP), then the CPP is reduced and device density is increased, but leakage current is induced and device reliability is compromised
Solution Approach 1:
The CPODE structure is segmented into multiple dielectric layers with different material compositions. The bottom portion uses a first dielectric material while the top portion uses a second dielectric material, creating distinct functional zones that address both density and reliability requirements simultaneously
Solution Approach 2:
Different portions of the CPODE structure are assigned different material properties. The bottom dielectric layer is optimized for one function while the top dielectric layer is optimized for another function, allowing each region to contribute to solving the overall technical contradiction
2Productivity
If a continuous poly on diffusion edge (CPODE) process is used to scale the contacted poly pitch (CPP), then the CPP is reduced and device density is increased, but undesirable leakage current is induced
Solution Approach 1:
A first dielectric material is introduced as an intermediary layer between the substrate and the second dielectric material. This intermediate layer acts as a barrier that prevents the formation of leakage current paths while maintaining the space-saving benefits of the CPODE structure
Solution Approach 2:
The CPODE structure employs composite materials consisting of two different dielectric materials stacked vertically. This composite approach combines the advantages of each material to achieve both high device density and low leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances device performance and reliability by minimizing leakage current, while being compatible with existing processes and costing minimally.
Implementation Method 1
using a fixed-charge-free material for the bottom portion
Implementation Method 2
CPODE structure with multiple dielectric layers of varying material composition stacked vertically
Data Source
AI summary
A method of fabricating a semiconductor device includes providing a partially-fabricated semiconductor device including a dummy gate structure disposed over a semiconductor layer stack. In some embodiments, the method further includes removing the dummy gate structure and at least a portion of each semiconductor layer of the semiconductor layer stack to form a trench. In some examples, the method further includes forming one or more refill layers in a bottom portion of the trench and forming one or more refill layers in a top portion of the trench over the bottom portion of the trench. In some embodiments, the one or more refill layers in the top and bottom portions of the trench respectively define top and bottom portions of an isolation structure. In some examples, at least one refill layer of respective ones of the top and bottom portions of the isolation structure have a different material composition.