CPP-GMR Device With Indium Oxide Spacer Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current CPP-GMR devices face challenges with high resistance values leading to increased stray capacitance and noise, and require high voltage for large MR ratios, which can cause magnetization direction changes and spin torque issues, affecting their performance and reliability.
Innovation Solution
A CPP-GMR device with a spacer layer comprising a first and second nonmagnetic metal layer and a semiconductor oxide layer made of indium oxide (In2O3) or containing SnO2, allowing for a thicker semiconductor oxide layer with low area resistivity, reducing noise and maintaining high MR performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the tunnel barrier layer is reduced to lower resistance, then resistance decreases, but pinholes occur and magnetic couple increases causing noise and performance degradation
Solution Approach 1:
A nonmagnetic metal intermediate layer is introduced between the tunnel barrier layer and the magnetic layers. This intermediate layer acts as a mediator that prevents direct magnetic coupling while maintaining electrical isolation, thereby reducing noise and preventing pinhole formation even when the tunnel barrier layer is thin.
Solution Approach 2:
The device uses a composite structure combining tunnel barrier layer (insulating material) with nonmagnetic metal intermediate layer. This composite approach allows the tunnel barrier to be made thinner for low resistance while the metal layer compensates by preventing magnetic coupling and pinholes, achieving both low resistance and high reliability.
2Measurement precision
If high voltage is applied to achieve large MR ratio, then MR ratio increases, but magnetization direction changes and spin torque issues occur
Solution Approach 1:
The invention changes the structural parameters by introducing the nonmagnetic metal intermediate layer with specific thickness (0.3-2.0 nm). This structural parameter change allows the device to achieve large MR ratio at lower voltages, preventing magnetization direction changes and spin torque issues that occur with high voltage application.
3Object-affected harmful factors
If the tunnel barrier layer is made very thin to reduce resistance, then resistance decreases, but head noise increases due to magnetic couple between layers
Solution Approach 1:
The nonmagnetic metal intermediate layer serves as an intermediary that decouples the magnetic interaction between the tunnel barrier layer and adjacent magnetic layers. This allows the tunnel barrier to be made very thin for low resistance while the intermediate layer blocks the magnetic coupling that would otherwise generate head noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low area resistivity and high MR performance while preventing device performance variations, enhancing reliability and reducing noise and spin torque effects, thus improving the overall performance of the CPP-GMR device.
Implementation Method 1
a semiconductor oxide layer which is made of indium oxide (In2O3) or contains SnO2
Implementation Method 2
a giant magneto-resistive effect device (CPP-GMR device) having a CPP (current perpendicular to plane) structure
Data Source
AI summary
The invention provides a giant magneto-resistive effect device (CPP-GMR device) having a CPP (current perpendicular to plane) structure comprising a spacer layer, and a fixed magnetized layer and a free layer stacked one upon another with said spacer layer interleaved between them, with a sense current applied in a stacking direction, wherein the spacer layer comprises a first and a second nonmagnetic metal layer, each formed of a nonmagnetic metal material, and a semiconductor oxide layer interleaved between the first and the second nonmagnetic metal layer, wherein the semiconductor oxide layer that forms a part of the spacer layer is made of indium oxide (In2O3), or the semiconductor oxide layer contains indium oxide (In2O3) as its main component, and an oxide containing a tetravalent cation of SnO2 is contained in the indium oxide that is the main component. The semiconductor oxide layer that forms a part of the spacer layer can thus be made thick while the device has a low area resistivity as desired, ensuring much more favorable advantages: ever higher MR performance, prevention of device area resistivity variations, and much improved reliability of film characteristics.