CPU Cache Flushing to Persistent Memory via Capacitor Holdup Power
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Solution Overview
Problem
Existing CPU cache flushing methods for persistent memory require complex programming models and additional instructions like PCOMMIT, which complicate the storage of data in persistent memory, especially during power failures, as they need to ensure that write commands are flushed from the CPU cache to the persistence domain.
Innovation Solution
A backup component using capacitors to provide holdup power in the computing system, eliminating the need for instructions like PCOMMIT by ensuring that write commands are stored in non-volatile memory, such as cross-point memory, even during power loss, thereby simplifying the instruction sequence for storing data in persistent memory locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CPU cache flushing instructions like PCOMMIT are used to ensure data persistence, then data reliability is improved, but device complexity and programming model complexity increase
Solution Approach 1:
The memory controller automatically performs cache flushing operations without requiring explicit PCOMMIT instructions from software. The system self-manages the persistence domain flushing, eliminating the need for complex instruction sequences while maintaining data reliability.
Solution Approach 2:
The patent extracts the cache flushing functionality from the CPU instruction set and relocates it to the memory controller. This separation removes the complexity of PCOMMIT instructions from the programming model while preserving the reliability benefits of persistent memory flushing.
2Reliability
If holdup power is provided to flush write commands from CPU cache during power failure, then data integrity is improved, but use of energy increases
Solution Approach 1:
The patent provides holdup power for a limited, partial duration just long enough to flush critical write commands from the CPU cache to persistent memory during power failure. This partial action approach provides sufficient protection for data integrity without continuously consuming excessive energy.
Solution Approach 2:
The system prepares holdup power in advance that automatically activates upon power failure detection. This preliminary preparation ensures immediate flushing action without requiring additional energy management decisions during the critical power loss event, balancing energy use with data protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures that data is reliably stored in persistent memory without the need for additional instructions, providing a simpler programming model and ensuring data integrity during power failures by using capacitors to hold power until data is written to non-volatile memory, thus avoiding data loss.
Implementation Method 1
A backup component using capacitors to provide holdup power in the computing system
Data Source
AI summary
A computing system having a power loss detector and memory components to store data associated with write commands received from a host system. The write commands are flushed from a protected write queue of the host system responsive to detecting an impending loss of power. The computing system further includes a processing device to receive the write commands over a memory interface. The processing device is further to, responsive to detecting the loss of power by the detector: disable the memory interface, and store the data associated with write commands that are received prior to disabling the memory interface. The data is stored in one or more of the memory components using power supplied by one or more capacitors.


