CPU Core Manager Dynamic Power Allocation for Image Forming
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Solution Overview
Problem
Existing image forming apparatuses face challenges in shortening overall processing time due to inefficient core management and power allocation, particularly in handling sequential and parallel processing tasks, which can lead to prolonged execution times for tasks like language analysis and rasterization.
Innovation Solution
The apparatus employs a CPU core manager to dynamically allocate pre-processes for sequential processing to a subset of cores and post-processes for parallel processing to other cores, adjusting power supply accordingly to optimize resource utilization based on the specific processing requirements of each task, such as language analysis and rasterization, and varying document loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If all cores are supplied with uniform electric power for parallel processing, then processing speed is improved, but power consumption increases
Solution Approach 1:
The patent segments the plurality of cores into multiple groups, where each group can be independently controlled for power supply. This allows selective activation of only the necessary core groups for current processing tasks, reducing overall power consumption while maintaining processing speed for active cores.
Solution Approach 2:
The patent implements dynamic power supply control that adjusts electric power allocation based on real-time processing requirements. The control unit dynamically determines which core groups need power supply and which can be powered down, adapting to varying computational demands to optimize the balance between processing speed and power consumption.
2Loss of time
If sequential processing is performed on all cores simultaneously, then overall processing time is reduced, but resource allocation efficiency decreases
Solution Approach 1:
The patent applies different processing modes to different core groups based on their specific capabilities and current task requirements. Sequential processing is applied to core groups handling language analysis while parallel processing is applied to core groups handling rasterization, optimizing resource allocation efficiency for each specific processing stage.
Solution Approach 2:
The patent divides the processing workflow into distinct stages (language analysis and rasterization) and assigns different core groups to each stage. This segmentation allows each core group to be optimized for its specific function, improving overall resource allocation efficiency while maintaining reduced processing time.
3Use of energy by moving object
If power is stopped to some cores during processing, then power consumption is reduced, but processing continuity may be affected
Solution Approach 1:
The patent performs preliminary analysis to determine the processing characteristics of input data before execution. Based on this preliminary assessment, the control unit pre-determines which core groups will be activated and which will remain powered down, ensuring processing continuity is maintained for necessary cores while minimizing power consumption.
Solution Approach 2:
The patent implements a feedback mechanism where the control unit monitors processing progress and dynamically adjusts power supply to core groups. This feedback control ensures that power is continuously supplied to cores that are actively processing while stopping power to idle cores, maintaining processing continuity without unnecessary power consumption.
Data Source
AI summary
An image forming apparatus includes a hardware processor including CPUs each including cores, a process being executed by the CPUs, wherein the hardware processor managing the cores causes a first process or a second process to be executed, when the first process is executed, while electric power is uniformly supplied to the cores, allocates a pre-process in which sequential processing is performed to a part of the cores and a post-process in which parallel processing is performed to another part of cores, and when the second process is executed, for a part of the CPUs, allocates the pre-process to a part of the cores while electric power is supplied thereto and causes electric power supply to another part of cores to be stopped, and for another part of the CPUs, allocates the post-process to at least a part of the cores while electric power is uniformly supplied to the cores.