CPU Core Power Management via Dynamic Voltage Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Portable devices such as smartphones and tablets face challenges in reducing power consumption while maintaining high performance and extending battery life, as existing methods fail to efficiently manage power consumption across various components like cache memory and processor cores.
Innovation Solution
The method involves controlling power consumption by defining cache memory into portions, using switches to supply voltage based on control signals, and dynamically adjusting clock frequency and voltage in response to workload and thermal analysis, with a power management unit generating control signals to optimize power distribution across CPU cores and cache memories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If voltage is supplied to all cache memory portions and processor cores continuously, then high performance is maintained, but power consumption increases
Solution Approach 1:
The cache memory is divided into multiple portions (e.g., L1 cache with multiple ways, L2 cache portions), and voltage supply is controlled independently for each portion through separate switches. This segmentation allows the system to supply power only to the portions currently needed for high-performance operations, while other portions can be powered down to reduce consumption.
Solution Approach 2:
The system dynamically adjusts voltage supply to cache memory portions and processor cores based on real-time workload conditions. The power management unit monitors workload intensity and generates control signals to switches, enabling the system to transition between high-performance mode (voltage supplied to all portions) and power-saving mode (voltage supplied only to necessary portions).
2Use of energy by moving object
If voltage supply is reduced to cache memory portions, then power consumption decreases, but performance may deteriorate
Solution Approach 1:
The power management unit implements a feedback mechanism by monitoring workload conditions and using this information to control voltage supply to cache memory portions. When workload requires high performance, the system detects this condition and restores voltage supply to the necessary cache portions. This feedback loop ensures performance is maintained when needed while enabling power savings during low-demand periods.
Data Source
AI summary
A data processing device includes a plurality of central processing unit (CPU) cores; a plurality of first switches connected between a power line and each of the plurality of CPU cores, respectively; a power management unit; and a dynamic voltage/frequency scaling control circuit configured to scale at least one of a voltage and a frequency of a clock signal which are supplied to each of the CPU cores according to a control of the power management unit, wherein the power management unit is configured to decrease at least one of the voltage and the frequency which are supplied to each of the CPU cores and generate each of first control signals controlling a switching operation of each of the plurality of first switches, according to a control of one of the CPU cores.