CPU Dynamic Voltage Scaling Using Workload Estimators

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Solution Overview

Problem

Conventional dynamic voltage scaling algorithms for CPUs either lead to unnecessary power consumption by setting operating voltages based on maximum workload values or fail to apply voltage changes effectively due to small workload sizes between basic blocks, causing inefficiencies and potential delays in real-time systems.

Innovation Solution

The method involves setting voltage points for code segments of a predetermined size, profiling workload variations, calculating workload estimators, and selecting an optimal combination to minimize energy consumption while ensuring real-time constraints are met, using a workload estimator to adjust operating voltages dynamically.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the operating voltage is set based on the maximum workload value to guarantee real-time constraints, then the reliability is improved, but the power consumption increases

Engineering Contradiction:
Improvereal-time constraint guaranteeVSAvoidCPU power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent performs preliminary workload profiling and analysis before runtime voltage scaling decisions. By pre-analyzing workload characteristics and establishing baseline performance data, the system can make informed voltage scaling decisions that guarantee real-time constraints without always using maximum voltage, thus reducing power consumption while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic voltage scaling by adjusting the operating voltage based on actual workload conditions rather than using a fixed maximum voltage. The system monitors workload characteristics and dynamically selects appropriate voltage levels from multiple scaling points, allowing the CPU to operate at lower voltages when full performance is not needed, thereby reducing power consumption while maintaining real-time constraint guarantees when necessary.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the basic block code segment algorithm is used to scale operating voltage, then the device complexity is reduced, but the productivity decreases due to inability to apply voltage changes effectively

Engineering Contradiction:
Improvevoltage scaling algorithm complexityVSAvoidvoltage change application effectiveness
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the code into segments of a predetermined size rather than using traditional basic blocks. This segmentation approach creates larger, more meaningful code segments that can effectively utilize voltage scaling while maintaining manageable complexity. The segmented approach allows for more productive voltage changes by ensuring that each scaling point covers sufficient computational work, avoiding the inefficiency of frequent small-scale voltage adjustments.

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If the overhead for voltage change is considered, then the loss of energy is reduced, but the productivity decreases when workload between basic blocks is too small

Engineering Contradiction:
ImproveDVS overhead energyVSAvoidvoltage scaling effectiveness
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent dynamically determines the appropriate code segment size based on the overhead characteristics of voltage changes. By making the segment size adaptive rather than fixed, the system can optimize the balance between overhead energy loss and scaling effectiveness. When workloads are small, the system can adjust segment boundaries or merging strategies to ensure that voltage changes are only applied when they will be productive, thus reducing energy waste from ineffective DVS operations.

Inventive Principle:
Principle #15Dynamics

4Use of energy by moving object

If voltage scaling is performed for all basic blocks in loops, then the power consumption is reduced, but the device complexity increases due to hundreds of thousands of scaling points

Engineering Contradiction:
ImproveCPU power consumptionVSAvoidnumber of scaling points
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges adjacent basic blocks into larger code segments of a predetermined size, particularly in loop structures. By combining multiple small basic blocks into unified segments, the system reduces the total number of voltage scaling points from hundreds of thousands to a manageable number. This merging strategy maintains power consumption reduction benefits by still applying voltage scaling, but eliminates the complexity burden of excessive scaling points while preserving energy efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7685446B2Dynamic voltage scaling method of CPU using workload estimator and computer readable medium storing the method
Publication Date: 2010.03.23 SAMSUNG ELECTRONICS CO LTD
  • US7685446B2 patent drawing
  • US7685446B2 patent drawing
  • US7685446B2 patent drawing

AI summary

A method for scaling a dynamic voltage of a CPU is achieved by setting a voltage setting point for each of a plurality of code segments of a program, and profiling workload by measuring a workload variation of each of the code segments based on data that changes whenever measured, selecting a plurality of combinations, each having a plurality of voltage setting points, and calculating workload estimators corresponding to the voltage setting points of each of the selected combinations based on the workload variation measured in the workload profiling operation, selecting an optimal combination that consumes a least energy of the CPU based on the workload estimators, and determining whether a real time constraint is satisfied when an operating voltage is set based on the workload estimator corresponding to each of the voltage setting points of the optimal combination during runtime, and setting the operating voltage based on a result of the determination.