CPU Dynamic Frequency Control via Scheduler Latency Feedback
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Solution Overview
Problem
Conventional CPU frequency control methods, such as CPUFreq framework, lack accurate prediction for energy consumption reduction and fail to consider scheduler performance state, leading to suboptimal power efficiency in multicore systems.
Innovation Solution
An apparatus and method for dynamic frequency control that includes a frequency setting unit, a latency measurement unit, and a frequency adjustment unit, which measure and adjust CPU frequencies based on scheduler execution information, such as delay and interrupt data, to optimize power usage across each core in a multicore system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional CPUFreq framework uses load information to set operating frequency, then frequency control is simple, but power efficiency is suboptimal due to inaccurate prediction
Solution Approach 1:
The patent implements a feedback mechanism where the scheduler execution information (latency measurements) is fed back to the CPUFreq framework to dynamically adjust frequency predictions. The scheduler measures latency and provides this information to the frequency governor, which then adjusts the operating frequency based on actual system behavior rather than just load information, improving power efficiency through more accurate predictions.
Solution Approach 2:
The patent introduces scheduler execution information as an intermediary between the scheduler and the CPUFreq framework. This intermediary provides additional context about system performance that neither the scheduler nor the frequency controller alone possesses, enabling more accurate frequency predictions and better power efficiency without requiring direct complex interaction between the scheduler and frequency controller.
2Use of energy by moving object
If CPUFreq framework collects more system information for accurate frequency prediction, then power efficiency improves, but information collection complexity increases
Solution Approach 1:
The patent makes the scheduler serve multiple functions: it not only performs its traditional task of process scheduling but also measures latency information that is used by the CPUFreq framework for frequency prediction. This multi-functionality allows the system to collect additional information without adding dedicated measurement mechanisms, reducing the overall complexity of information collection while improving power efficiency.
Solution Approach 2:
The scheduler measures its own execution latency and provides this information to the CPUFreq framework autonomously. The system uses its existing operational data (scheduler execution time, interrupt delays) to improve frequency prediction without requiring external monitoring tools or additional sensors, enabling self-service information collection that improves power efficiency without increasing complexity.
3Measurement precision
If scheduler and CPUFreq framework operate independently, then system modularity is maintained, but frequency optimization accuracy is reduced
Solution Approach 1:
The patent maintains clear segmentation between the scheduler and CPUFreq framework while enabling information exchange. The scheduler remains responsible for process scheduling and latency measurement, while the CPUFreq framework handles frequency control based on load information and scheduler execution data. This segmentation allows each component to remain simple and modular while achieving accurate frequency prediction through the combination of their respective information.
Data Source
AI summary
An apparatus and method for performing the dynamic frequency control of a central processing unit (CPU). The apparatus for performing the dynamic frequency control of a central processing unit (CPU) includes a frequency setting unit, a latency measurement unit, a frequency adjustment unit, and a control unit. The frequency setting unit sets optimum frequency using the measured amount of load. The latency measurement unit measures scheduler execution information. The frequency adjustment unit adjusts the optimum frequency using the scheduler execution information. The control unit incorporates the adjusted optimum frequency into a CPU.