CPU Instruction Substitution for Fault and Side-Channel Defense
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing countermeasures against fault and side-channel attacks on CPUs significantly impact performance, necessitating a more efficient and less intrusive method for secure instruction execution.
Innovation Solution
The method involves the processing means replacing sensitive instructions with a combination of instructions that perform the original function and a dedicated security countermeasure, selected from internal memory, without additional fetching from external memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional memory access methods are used, then processing speed is maintained, but data security is compromised due to buffer overflow vulnerabilities and unauthorized access
Solution Approach 1:
The memory space is segmented into secure and non-secure regions using memory protection units. Each region has defined access permissions that are enforced by the memory management architecture, preventing unauthorized access while maintaining system functionality.
Solution Approach 2:
Memory protection units and memory management intermediaries are introduced between the processor and memory to enforce security policies. These intermediaries check access requests, validate permissions, and block unauthorized operations without requiring complex changes to the core processor architecture.
2Reliability
If hardware security features are added to protect against buffer overflows, then data security improves, but processing speed decreases due to additional validation overhead
Solution Approach 1:
Security parameters such as memory protection keys and access permissions are pre-configured in hardware registers before execution. The memory protection units use these pre-set parameters to automatically validate access requests without requiring runtime computation or software intervention, minimizing performance overhead.
Solution Approach 2:
Software-based security checks are replaced with hardware-enforced memory protection mechanisms. The memory management unit automatically enforces access controls through dedicated hardware circuits, eliminating the need for software validation loops and reducing processing delays.
3Ease of operation
If memory protection keys are stored in general-purpose registers, then ease of access is improved, but security is weakened due to potential unauthorized access and instruction buffer caching
Solution Approach 1:
Memory protection keys are extracted from general-purpose registers and stored in dedicated secure storage locations within the memory management unit. This separation ensures that keys are not exposed to the instruction buffer or other vulnerable components while remaining accessible to authorized memory access operations.
Solution Approach 2:
Instead of storing the actual memory protection keys in accessible registers, the system uses copied or derived key values in secure internal buffers. The original keys remain protected in secure storage, and only authorized components can access the copied values needed for memory validation.
Data Source
Figure 1
Figure 2
AI summary
The present invention relates to a method for a secure execution of a first instruction by processing means of an electronic system, comprising : − fetching (S1) said first instruction in an execution pipeline of the processing means, − determining (S2) that said first instruction to be executed is an instruction sensitive to a determined attack, wherein said first instruction, when executed by the processing means, causes the processing means to perform a first function, − selecting (S3), based on said determined attack, from an internal memory of said processing means, at least one second instruction, which, when executed by the processing means, causes the processing means to perform a combination of said first function and a dedicated security countermeasure against said determined attack, − executing (S4) said selected second instructions instead of said first instruction.