CPU Load Distribution in Block-Based Computation

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Solution Overview

Problem

Existing methods for distributing computing load in data processing devices during block-based computing operations, such as audio and video signal processing, lead to uneven utilization of processor resources and significant delays, making real-time processing challenging due to the separation of input, output, and calculation phases.

Innovation Solution

The method subdivides the calculation rule into multiple calculation steps processed sequentially within a block, ensuring each step generates a consistent computing load, allowing for even distribution of processing capacity across time windows, thereby eliminating the separation of input and output phases and optimizing CPU utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fast convolution with FFT is used to reduce calculation effort, then computational efficiency is improved, but real-time processing capability deteriorates because the entire audio signal must be available before transformation can begin

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidreal-time processing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the impulse response into multiple blocks and processes convolution in sections rather than requiring the entire signal. This segmentation allows incremental processing where each block can be transformed and combined progressively, enabling real-time output generation without waiting for complete signal availability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary FFT transformation on impulse response blocks in advance and stores the transformed data. When processing is needed, the pre-transformed blocks are readily available for multiplication and combination, eliminating the need to wait for complete signal availability before starting transformation operations.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If section convolution is used to enable real-time processing, then real-time capability is improved, but computing load distribution becomes uneven with alternating input/output phases and calculation phases

Engineering Contradiction:
Improvereal-time processing capabilityVSAvoidcomputing load distribution
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent segments both the impulse response into blocks and the FFT operation into multiple stages. This dual segmentation allows the calculation work to be distributed across multiple processing steps rather than concentrated in single phases, creating a more uniform computing load distribution over time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic scheduling where multiple blocks are processed in an interleaved manner rather than sequentially completing one block entirely before starting the next. This dynamic approach overlaps input, transformation, and output operations across different blocks, smoothing out the computing load distribution.

Inventive Principle:
Principle #15Dynamics

3Productivity

If asynchronous section convolution is used to separate input/output phases from calculation phases, then load distribution is improved, but synchronization overhead increases and real-time capability deteriorates

Engineering Contradiction:
Improveload distributionVSAvoidsynchronization delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent maintains continuous processing by ensuring that while one block is being transformed, another block's results are being multiplied and combined, and a third block is being prepared for transformation. This continuous overlapping of operations eliminates idle synchronization periods while maintaining proper data dependencies.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent uses dynamic block selection and processing scheduling that adapts to current system state and data availability. This dynamic approach allows flexible coordination between different processing stages without rigid synchronization points, reducing synchronization overhead while maintaining real-time capability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2302526B1Method for distributing CPU load in data processing devices when executing block-based computation processes
Publication Date: 2018.12.26 NATIVE INSTRUMENTS
  • EP2302526B1 patent drawingFigure 1~2
  • EP2302526B1 patent drawingFigure 3~4
  • EP2302526B1 patent drawingFigure 5~6

AI summary

The method involves structuring the input values in block operation of the algorithm in two computational steps (20). The computational steps are processed one after the other within a block. The computational steps generate the same computational load. The computational steps are processed in the time interval of the input values. The block needs a blockwise predetermined number of input values running in a chronological sequence. Independent claims are also included for the following: (1) an arrangement for executing the method; (2) a computer program for executing the method; and (3) a computer-readable storage medium for executing the method.