CPU Load Estimation via Communication Correlation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing systems face challenges in accurately estimating CPU load before a failure occurs, especially since measuring resident processes can affect other operations, making it difficult to reproduce the system status and investigate failure causes.
Innovation Solution
An information processing device generates data on the relationship between processing and communication loads in a similar system, allowing it to estimate CPU loads before a failure by calculating based on communication loads after the failure, and adjusts transmission patterns to reproduce the CPU load accurately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a resident process is operated to obtain CPU load log in the system in operation, then it is possible to obtain information on CPU load before failure occurs, but the resident process may affect other processes
Solution Approach 1:
The patent introduces a log file as an intermediary to store CPU load information. Instead of directly measuring CPU load through a resident process that interferes with system operations, the system writes CPU load data to a log file periodically. This intermediary storage mechanism allows verification systems to obtain accurate CPU load information without deploying monitoring processes that would affect system stability.
Solution Approach 2:
The patent creates a copy of the system state by logging CPU load information to a file. Rather than continuously monitoring the live system which causes interference, the system periodically captures and stores copies of CPU load data. These copies can then be analyzed by verification systems without affecting the original system's operational stability.
2Reliability
If no resident process is used to avoid affecting other processes, then system operation stability is maintained, but it becomes difficult to obtain CPU load information before failure occurs
Solution Approach 1:
The patent implements preliminary action by periodically writing CPU load information to a log file before failures occur. Instead of attempting to measure CPU load after a failure or using continuous monitoring, the system proactively captures and stores CPU load data at regular intervals during normal operation. This ensures that when a failure occurs, the verification system can retrieve the most recent logged CPU load information without needing to interfere with system operations.
3Measurement precision
If communication load data from similar systems is used to estimate CPU load, then accurate estimation without resident processes is achieved, but additional data collection and processing complexity is introduced
Solution Approach 1:
The patent applies universality by establishing a correlation between communication load and CPU load that can be applied across multiple similar systems. Once the correlation is determined for a system type, the same relationship can be used to estimate CPU load in other similar systems based on their communication load data. This multi-functional approach allows the verification system to estimate CPU loads without deploying resident processes in each target system, reducing overall complexity while maintaining accuracy.
Data Source
AI summary
An information processing device including a memory, and a processor coupled to the memory and the processor configured to execute a process, the process including generating data indicating a relationship between a processing load and a communication load of a first computer which executes a specified process in a second information processing system which is the same as or similar to a first information processing system in which a failure occurs, and calculating a processing load of a second computer which executes the specified process in the first information processing system based on the generated data and a communication load of the second computer, the estimated processing load being a processing load before the failure occurs in the first information processing system.