CPU Machine Check Exception Timestamping for Root Cause Analysis

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Solution Overview

Problem

Complex computing environments often experience errors that are difficult to interpret due to their complex failure modes, leading to long error logs with errors logged on a per-component basis rather than in the order of occurrence, making it challenging for technicians to determine the root cause of system failures.

Innovation Solution

Implementing Machine Check (MC) banks in CPUs that store timestamps upon error occurrence, allowing for the organization of errors in the order of occurrence, and utilizing a utility box (U-Box) to manage and communicate these timestamps to firmware, operating systems, and network components, enabling more accurate determination of causal errors and reducing debugging complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If errors are logged on a per-component basis, then each component's error information is captured, but the error logs become difficult to interpret and require extensive review to determine root cause

Engineering Contradiction:
Improveerror logging completenessVSAvoiderror log interpretability
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The system performs preliminary actions by capturing timestamps at the moment each error occurs in the error logging registers. These timestamps are stored alongside the error information before any system reboot or reset occurs. This preliminary capture of temporal data enables chronological reconstruction of error sequences, allowing technicians to immediately identify root causes without extensive log review.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Timestamps serve as an intermediary element that mediates between the raw error data and the technician's analysis. By introducing this temporal marker, the system transforms uninterpretable error logs into chronologically ordered sequences that clearly indicate causality relationships, making the error logging system both complete and easily interpretable.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If multiple error logs are collected from different components, then comprehensive error data is obtained, but determining the order of error occurrence becomes difficult

Engineering Contradiction:
Improveerror data volumeVSAvoiddebugging time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system performs preliminary action by capturing and storing timestamps in the error logging registers at the exact moment each error occurs. This temporal information is preserved before any system state changes, enabling immediate chronological sorting of all error logs without requiring time-consuming analysis of error sequences during debugging.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the parameter of error log organization from component-based ordering to time-based ordering. By introducing timestamps as a new organizing parameter, the system transforms the error log structure to enable rapid identification of error sequences and root causes, significantly reducing debugging time while maintaining comprehensive error data collection.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If error logs are scanned in component order, then all errors are captured, but the chronological sequence of errors is lost

Engineering Contradiction:
Improveerror capture completenessVSAvoiderror sequence information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The system performs preliminary action by capturing timestamps in the error logging registers at the moment each error occurs. This temporal information is stored alongside the error data before any scanning or processing occurs, ensuring that the chronological sequence is preserved regardless of the scanning order. This enables complete error capture while maintaining sequence information for root cause analysis.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system creates a copy of the temporal information (timestamps) that is independent of the scanning order. By storing timestamps in the error logging registers alongside the error data, the system preserves the original chronological sequence as a separate information layer, allowing technicians to reconstruct the true error sequence even when errors are scanned in component order.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11687391B2Serializing machine check exceptions for predictive failure analysis
Publication Date: 2023.06.27 INTEL CORP
  • US11687391B2 patent drawing
  • US11687391B2 patent drawing
  • US11687391B2 patent drawing

AI summary

Upon occurrence of multiple errors in a central processing unit (CPU) package, data indicating the errors is stored in machine check (MC) banks. A timestamp corresponding to each error is stored, the timestamp indicating a time of occurrence for each error. A machine check exception (MCE) handler is generated to address the errors based on the timestamps. The timestamps can be stored in the MC banks or in a utility box (U-box). The MCE handler can then address the errors based on order of occurrence, for example by determining that the first error in time causes the remaining error. The MCE can isolate hardware/software associated with the first error to recover from a failure. The MCE can report only the first error to the operating system (OS) or other error management software/hardware. The U-Box may also convert the timestamps into real time to support user debugging.