Out-of-Order CPU Inspection Prevents Meltdown Timing Attacks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional processors with out-of-order execution are vulnerable to Meltdown attacks due to timing differences in permission checks, leading to potential data leaks, and existing solutions like Kernel page-table isolation impact system efficiency.

Innovation Solution

An inspection method and device that utilize a finite state graph module, logic expression transformation, and model validation to ensure that a refill request is not sent by the data cache unit and key data is not read or utilized by the load-store and calculation units before an exception commitment triggered by a permission check failure, effectively preventing Meltdown attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If out-of-order execution is implemented in the processor, then processing speed and efficiency are improved, but the processor becomes vulnerable to Meltdown attacks due to timing differences in permission checks

Engineering Contradiction:
Improveprocessing speedVSAvoidvulnerability to Meltdown attacks
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by performing the permission check before the out-of-order execution unit accesses the memory address. The permission check unit determines whether the address is in kernel space before allowing the load-store unit to proceed with the memory access, preventing the timing window that enables Meltdown attacks while maintaining out-of-order execution performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a permission check unit as an intermediary between the out-of-order execution unit and the memory access system. This intermediary unit intercepts memory access requests, performs permission validation, and only allows proceeds if the access is permitted, thereby blocking the attack vector without disrupting the overall execution flow

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If Kernel page-table isolation method is used to prevent Meltdown attacks, then security is improved, but system efficiency is degraded

Engineering Contradiction:
Improvesecurity against Meltdown attacksVSAvoidsystem efficiency
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

The patent extracts the permission check function from the kernel page-table isolation mechanism and implements it as a dedicated hardware unit at the front end of the processor. This separates the security validation function from the general memory management system, allowing permission checks to be performed efficiently in parallel with other operations without impacting overall system efficiency

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20240378060A1Inspection method and related inspection device for out-of-order execution central processing unit circuit
Publication Date: 2024.11.14 REALTEK SEMICON CORP
  • US20240378060A1 patent drawing
  • US20240378060A1 patent drawing
  • US20240378060A1 patent drawing

AI summary

An inspection method for an out-of-order execution processing circuit, includes determining that a refill request is not sent by a data cache unit of the out-of-order execution processing circuit before an exception commitment triggered by a permission check failure of the out-of-order execution processing circuit; and determining a key data is not read by a load-store unit of the out-of-order execution processing circuit and the key data is not utilized by a calculation unit of the out-of-order execution processing circuit before the exception commitment triggered by the permission check failure of the out-of-order execution processing circuit.